Altera Quartus

Known as: Quartus II, Sopc builder 
Altera Quartus II is a programmable logic device design software produced by Altera. Quartus II enables analysis and synthesis of HDL designs, which… (More)
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Topic mentions per year

Topic mentions per year

1998-2018
0204019982018

Papers overview

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2014
2014
To protect Field-Programmable Gate Array (FPGA) designs against Intellectual Property (IP) theft and related issues such as… (More)
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2014
2014
This paper presents a FPGA (field programmable gate array)-based design of Grid Friendly Appliance (GFA) controller. A GFA… (More)
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2013
2013
In order to protect FPGA designs against IP theft and related issues such as product cloning, all major FPGA manufacturers offer… (More)
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2012
2012
In paper is presented HDL Code generation of Cordic Algorithm in MATLAB/Simulink, using HDL Code generation tool, and its… (More)
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2009
2009
Abstract: In control applications, most of the physical systems require a real-time operation to interface high speed constraints… (More)
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2009
2009
This paper presents the designed obstacle avoidance program for mobile robot that incorporates a neuro-fuzzy algorithm using… (More)
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2006
2006
  • Steven Strell
  • 2006
Today’s high-speed, high pin count FPGA devices demand skilled printed circuit board design practices. FPGA designers must… (More)
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2004
2004
  • Paul Metzgen
  • 2004 International Symposium on System-on-Chip…
  • 2004
Summary form only given. Altera's SOPC Builder Tool enables engineers to create tailor-made systems in an FPGA with a short… (More)
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2002
2002
  • 2002
ble-chip (SOPC) design becomes the norm, hardware, software, and systems designers grapple with new verification challenges in… (More)
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1998
1998
  • 1998
Introduction Designers are creating FPGAs that continue to increase in logic density and performance, yet their time-to-market… (More)
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