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Logic built-in self-test

Known as: LBIST 
Logic built-in self-test (or LBIST) is a form of built-in self-test (BIST) in which hardware and/or software is built into integrated circuits… 
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Related topics

Related topics

12 relations
Analogue electronicsArray data structureBuilt-in self-testBuilt-in test equipment

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
Techniques for Seed Computation and Testability Enhancement for Logic Built-In Self Test
With the increase of device complexity and test-data volume required to guarantee adequate defect coverage, external testing is… 
2011
2011
Logic Built-in Self-test
The last two chapters represented two DFT methods. Scan testing in Chap. 7 focused on testing inside a core (or the logic part… 
2010
2010
Adaptive Low Shift Power Test Pattern Generator for Logic BIST
Increasing the correlation among adjacent test stimulus bits can significantly reduce shift power consumption. However, it often… 
2010
2010
Logic built-in self-test system
The invention discloses a logic built-in self-test system. The system comprises a test vector generating system and a testing… 
2008
2008
Logic Built-In Self-Test for Core-Based Designs on System-on-a-Chip
System-on-a-chip (SoC) built with embedded IP cores offers attractive methodology design reuse, reconfigurability, and… 
2006
2006
Scalable deterministic logic built-in self test
The core-based design style of integrated circuits (ICs) helps to manage the development challenges brought by the ever… 
Highly Cited
2006
Highly Cited
2006
Advances in electronic testing : challenges and methodologies
Foreword by Vishwani D. Agrawal Preface by Dimitris Gizopoulos Contributing Authors Dedication Chapter 1-Defect-Oriented Testing… 
Highly Cited
2001
Highly Cited
2001
Design of compactors for signature-analyzers in built-in self-test
Originally developed decades ago, logic built-in self-test (BIST) evolved and is now increasingly being adopted to cope with… 
1999
1999
Design and implementation of a parallel weighted random pattern and logic built in self test algorithm
An increase in chip densities has led to a significant increase in test generation and fault simulation times. Analysis of… 
1998
1998
Modular logic built-in self-test for IP cores
  • J. RajskiJ. Tyszer
  • Proceedings International Test Conference (IEEE…
  • 1998
  • Corpus ID: 22838696
The paper presents a new modular logic BIST architecture for intellectual property (IF) cores and block-oriented design… 
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