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LOCOS

Known as: LOCal Oxidation of Silicon, Loco 
LOCOS, short for LOCal Oxidation of Silicon, is a microfabrication process where silicon dioxide is formed in selected areas on a silicon wafer… 
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Related topics

Related topics

8 relations
Charge-coupled deviceChemical vapor depositionFront end of lineMicrofabrication

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Design of a Reliable p-Channel LDMOS FET With RESURF Technology
High-voltage lateral diffused MOS (LDMOS) FETs have been widely developed and studied for analog application. High-temperature… 
2008
2008
Fabricating capacitive micromachined ultrasonic transducers with direct wafer-bonding and LOCOS technology
We present an improved fabrication method for capacitive micromachined ultrasonic transducers (CMUTs). Recently, a process was… 
2007
2007
Origen, evolución y crisis de la institución psiquiátrico penitenciaria
El sistema psiquiatrico penitenciario surge como institucion especializada. El modelo hoy esta en crisis en Espana por vulnerar… 
2005
2005
A novel trench capacitor enhancement approach by selective liquid-phase deposition
For the first time, a novel and simple trench bottle integrated process is demonstrated on dynamic random access memory (DRAM… 
2005
2005
Nanometer resolution TEM sample manipulator for rotational and translational positioning
The design and fabrication process for a high performance manipulation stage for nanometer resolution TEM sample positioning over… 
Review
2005
Review
2005
ELECTRICAL CHARACTERIZATION AND MODELING OF LATERAL DMOS TRANSISTOR - INVESTIGATION OF CAPACITANCE AND HOT CARRIER IMPACT
1. 1. High-Voltage and Power CMOS Evolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1. 2. High… 
2005
2005
Spectroscopic studies of nano-structures of AI and Fe phases, bauxite and their thermally activated products
This thesis is made as it is submitted as a sum of published papers by the candidate. Aluminium hydroxides including gibbsite… 
1999
1999
MODELING OF MECHANICAL STRESS IN SILICON ISOLATION TECHNOLOGY AND ITS INFLUENCE ON DEVICE CHARACTERISTICS
To my family iv ACKNOWLEDGMENTS I would like to express my sincere gratitude to Dr. Mark Law, chairman of my advisory committee… 
1997
1997
Impact Of Trench Sidewall Interface Trap In Shallow Trench Isolation On Junction Leakage Current Characteristics For Sub-0.25 /spl mu/m CMOS Devices
A methodology of direct characterization of interface traps in trench sidewall in STI structure is presented for the first time… 
1987
1987
Oxidation rate reduction in the submicrometer LOCOS process
Experimental and analytical studies on submicrometer LOCOS oxide structures have been carried out. LOCOS oxide thickness… 
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