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KVM switch
Known as:
KVM Switches
, KVM
, KVM extender
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A KVM switch (with KVM being an abbreviation for "keyboard, video and mouse") is a hardware device that allows a user to control multiple computers…
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Related topics
Related topics
38 relations
19-inch rack
ActiveX
BIOS
Category 5 cable
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Broader (1)
Input/output
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Developing a New HSR Switching Node (SwitchBox) for Improving Traffic Performance in HSR Networks
N. Tien
,
J. Rhee
2016
Corpus ID: 15087036
High availability is crucial for industrial Ethernet networks as well as Ethernet-based control systems such as automation…
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2013
2013
HPC Performance and Energy-Efficiency of Xen, KVM and VMware Hypervisors
Sébastien Varrette
,
Mateusz Guzek
,
Valentin Plugaru
,
Xavier Besseron
,
P. Bouvry
25th International Symposium on Computer…
2013
Corpus ID: 15151796
With a growing concern on the considerable energy consumed by HPC platforms and data centers, research efforts are targeting…
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2013
2013
Advanced Concept of Voice Communication Server on Embedded Platform
M. Voznák
,
Karel Tomala
,
Jiri Vychodil
,
J. Slachta
2013
Corpus ID: 55946150
The paper deals with a design of an embedded Voice communication server which was developed within the scope of the BESIP project…
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2012
2012
KVM & OpenVZ virtualization based IaaS open source cloud virtualization platforms: OpenNode, Proxmox VE
A. Kővári
,
Peter Dukan
IEEE 10th Jubilee International Symposium on…
2012
Corpus ID: 6341334
The evolution of cloud computing over the past few years is one of the major advances in the history of computing. OpenNode…
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2011
2011
New power-efficient FPGA design combining with region-constrained placement and multiple power domains
Ce Li
,
Yiping Dong
,
Takahiro Watanabe
IEEE International New Circuits and Systems…
2011
Corpus ID: 32805148
Multiple power domain design architectures have been studied for the power-efficient FPGAs. But, most of these researches pay…
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2010
2010
A Low Power and High Throughput Self Synchronous FPGA Using 65 nm CMOS with Throughput Optimization by Pipeline Alignment
B. Devlin
,
T. Nakura
,
M. Ikeda
,
K. Asada
IEICE Transactions on Fundamentals of Electronics…
2010
Corpus ID: 9797871
We detail a self synchronous field programmable gate array (SSFPGA) with dual-pipeline (DP) architecture to conceal pre-charge…
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2008
2008
Quantifying Performance Properties of Virtual Machine
Xianghua Xu
,
F. Zhou
,
Jian Wan
,
Yucheng Jiang
International Symposium on Information Science…
2008
Corpus ID: 6132763
In this paper we present results from test and quantitative analysis of leading hypervisors Xen, Kvm and Vmware. Our test…
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Highly Cited
2008
Highly Cited
2008
Designing a 3-D FPGA: Switch Box Architecture and Thermal Issues
Aman Gayasen
,
N. Vijaykrishnan
,
M. Kandemir
,
Arifur Rahman
IEEE Transactions on Very Large Scale Integration…
2008
Corpus ID: 38969565
Three-dimensional (3-D) integration is an attractive technology to reduce wirelengths in a field-programmable gate array (FPGA…
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Review
2002
Review
2002
J2ME In A Nutshell
Kim Topley
,
R. Eckstein
2002
Corpus ID: 59916698
J2ME in a Nutshell provides a solid, no-nonsense reference to the alphabet soup of micro edition programming, covering the CLDC…
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Highly Cited
1984
Highly Cited
1984
A Switchbox Router with Obstacle Avoidance
Gordon T. Hamachi
,
J. Ousterhout
Design Automation Conference, Proceedings
1984
Corpus ID: 12525813
Detour is the channel router used by the Magic layout system. Based on Rivest and Fiduccia's "greedy" channel router, Detour is…
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