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Integrated circuit layout
Known as:
IC layout
, Layout
, Physical layout
Integrated circuit layout, also known IC layout, IC mask layout, or mask design, is the representation of an integrated circuit in terms of planar…
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Related topics
Related topics
25 relations
Advanced Design System
Circuit diagram
Circuit extraction
Constraint graph (layout)
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2010
2010
Modelling of long High Voltage AC Cables in the Transmission System
U. S. Gudmundsdottir
2010
Corpus ID: 109468411
The research documented in this thesis addresses Modelling of long High Vo ltage AC cables in Transmission Systems. Modelling…
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2009
2009
Fully Programmable Universal Filter with Independent Gain-omega0-Q Control Based on New digitally Programmable CMOS CCII
T.M. Hassan
,
S. Mahmoud
J. Circuits Syst. Comput.
2009
Corpus ID: 24849881
A fully programmable second-order universal filter with independently controllable characteristics is presented in this paper…
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2003
2003
Determining How Libraries and Librarians Help
J. Durrance
,
K. Fisher
Library Trends
2003
Corpus ID: 10545202
This article examines the question, “What differences do libraries and librarians make?” primarily from the perspective of…
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2001
2001
FedEx - a fast bridging fault extractor
Z. Stanojevic
,
D. Walker
Proceedings International Test Conference (Cat…
2001
Corpus ID: 15612962
Test pattern generation and diagnosis algorithms that target realistic bridging faults must be provided with a realistic fault…
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Highly Cited
1999
Highly Cited
1999
Performance evaluation of distributed co-ordination function for IEEE 802.11 wireless LAN protocol in presence of mobile and hidden terminals
S. Khurana
,
Anurag Kahol
,
Sandeep K. S. Gupta
,
P. Srimani
MASCOTS '99. Proceedings of the Seventh…
1999
Corpus ID: 1352834
This paper investigates the performance of IEEE 802.11 wireless local area network (WLAN) protocol's distributed coordination…
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Highly Cited
1999
Highly Cited
1999
Challenges in clockgating for a low power ASIC methodology
David Garrett
,
Mircea R. Stan
,
A. Dean
Proceedings / International Symposium on Low…
1999
Corpus ID: 13973312
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power…
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Highly Cited
1984
Highly Cited
1984
Design and Application of Self-Testing Comparators Implemented with MOS PLA's
Y. Tamir
,
C. Séquin
IEEE transactions on computers
1984
Corpus ID: 11137821
A high probability of detecting errors caused by hardware faults is an essential property of any fault-tolerant system. VLSI…
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Highly Cited
1978
Highly Cited
1978
Methods for Hierarchical Automatic Layout of Custom LSI Circuit Masks
B. Preas
,
C. Gwyn
Design Automation Conference
1978
Corpus ID: 16602268
A new automatic IC mask layout code is described which avoids most of the problems inherent in the present generation of layout…
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1971
1971
Computer-Aided Layout System for Integrated Circuits
D. Lynn
1971
Corpus ID: 62137627
A computer-aided mask layout system is described. The purpose of the system is to assist the designer in making the transition…
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1970
1970
IC mask layout with a single conductor layer
S. Akers
,
James M. Geyer
,
D. L. Roberts
Design Automation Conference
1970
Corpus ID: 11293984
A computer program for the automatic layout of single conductor layer IC masks is described. Descriptions are included of element…
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