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Constraint graph (layout)
Known as:
Horizontal constraint graph
, Vertical constraint graph
In some tasks of integrated circuit layout design a necessity arises to optimize placement of non-overlapping objects in the plane. In general this…
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Related topics
Related topics
6 relations
Directed graph
Floorplan (microelectronics)
Integrated circuit
Integrated circuit layout
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
1997
1997
An algorithm for finding a non-trivial lower bound for channel routing
R. Pal
,
S. P. Pal
,
A. Pal
Proceedings Tenth International Conference on…
1997
Corpus ID: 17287068
Channel routing is a key problem in the physical design of VLSI chips. It is known that max(d/sub max,/v/sub max/) is a lower…
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1996
1996
On locally optimal breaking of complex cyclic vertical constraints in VLSI channel routing
A. D. Johnson
Proceedings of the Sixth Great Lakes Symposium on…
1996
Corpus ID: 38135642
Existing theory has supported deterministic polynomial time procedures for locally optimal breaking (LOB) of two classes of…
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1995
1995
On locally optimal breaking of nondisjoint cyclic vertical constraints in VLSI channel routing
A. D. Johnson
Proceedings. Fifth Great Lakes Symposium on VLSI
1995
Corpus ID: 3154017
Locally optimal breaking strategy was already developed for disjoint directed circuits in the vertical constraint graph. The…
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1993
1993
Modeling the vertical constraints in VLSI channel routing
Antonije D. Jovanovic
[] Proceedings Third Great Lakes Symposium on…
1993
Corpus ID: 27407442
Demonstrates that the vertical constraint graph (VCG) is not a complete representation of the vertical constraints of a channel…
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1991
1991
New algorithm for over-the-cell channel routing using vacant terminals
N. D. Holmes
,
N. Sherwani
,
M. Sarrafzadeh
28th ACM/IEEE Design Automation Conference
1991
Corpus ID: 18493232
In this paper, we present a new algorithm, called WISER, for over-the-cell channel routing in the standard cell design technology…
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1991
1991
A hierarchical methodology to improve channel routing by pin permutation
C. Y. Hou
,
C. Y. Chen
IEEE International Conference on Computer-Aided…
1991
Corpus ID: 19100137
A hierarchical pin permutation algorithm is presented which is used as a preprocessor of conventional channel routing algorithms…
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1991
1991
Algorithms for three-layer over-the-cell channel routing
N. D. Holmes
,
N. Sherwani
,
M. Sarrafzadeh
IEEE International Conference on Computer-Aided…
1991
Corpus ID: 40072751
The authors present a novel algorithm for three-layer, over-the-cell channel routing of standard cell designs. The novelty of the…
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1987
1987
A Mixed HVH-VHV Algorithm for Three-Layer Channel Routing
V. Pitchumani
,
Q. Zhang
IEEE Transactions on Computer-Aided Design of…
1987
Corpus ID: 13951570
We present a hybrid three-layer channel-routing algorithm that combines horizontal-vertical-horizontal (HVH) and vertical…
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1985
1985
A Method of Improving the Terminal Assignment in the Channel Routing for Gate Arrays
M. Terai
IEEE Transactions on Computer-Aided Design of…
1985
Corpus ID: 15465353
The channel router, which routes a rectangular channel with two rows of terminals along its top and bottom sides, is extensively…
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1983
1983
General channel-routing algorithm
M. Marek-Sadowska
,
E. Kuh
1983
Corpus ID: 62107968
A new approach to the 2-layer channel-routing problem is introduced. The method allows horizontal and vertical connections on…
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