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Constraint graph (layout)

Known as: Horizontal constraint graph, Vertical constraint graph 
In some tasks of integrated circuit layout design a necessity arises to optimize placement of non-overlapping objects in the plane. In general this… 
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
1997
1997
Channel routing is a key problem in the physical design of VLSI chips. It is known that max(d/sub max,/v/sub max/) is a lower… 
1996
1996
  • A. D. Johnson
  • 1996
  • Corpus ID: 38135642
Existing theory has supported deterministic polynomial time procedures for locally optimal breaking (LOB) of two classes of… 
1995
1995
  • A. D. Johnson
  • 1995
  • Corpus ID: 3154017
Locally optimal breaking strategy was already developed for disjoint directed circuits in the vertical constraint graph. The… 
1993
1993
Demonstrates that the vertical constraint graph (VCG) is not a complete representation of the vertical constraints of a channel… 
1991
1991
In this paper, we present a new algorithm, called WISER, for over-the-cell channel routing in the standard cell design technology… 
1991
1991
A hierarchical pin permutation algorithm is presented which is used as a preprocessor of conventional channel routing algorithms… 
1991
1991
The authors present a novel algorithm for three-layer, over-the-cell channel routing of standard cell designs. The novelty of the… 
1987
1987
We present a hybrid three-layer channel-routing algorithm that combines horizontal-vertical-horizontal (HVH) and vertical… 
1985
1985
The channel router, which routes a rectangular channel with two rows of terminals along its top and bottom sides, is extensively… 
1983
1983
A new approach to the 2-layer channel-routing problem is introduced. The method allows horizontal and vertical connections on…