Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 230,961,566 papers from all fields of science
Search
Sign In
Create Free Account
Constraint graph (layout)
Known as:
Horizontal constraint graph
, Vertical constraint graph
In some tasks of integrated circuit layout design a necessity arises to optimize placement of non-overlapping objects in the plane. In general this…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
6 relations
Directed graph
Floorplan (microelectronics)
Integrated circuit
Integrated circuit layout
Expand
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
1996
1996
On locally optimal breaking of complex cyclic vertical constraints in VLSI channel routing
A. D. Johnson
Proceedings of the Sixth Great Lakes Symposium on…
1996
Corpus ID: 38135642
Existing theory has supported deterministic polynomial time procedures for locally optimal breaking (LOB) of two classes of…
Expand
1995
1995
On locally optimal breaking of nondisjoint cyclic vertical constraints in VLSI channel routing
A. D. Johnson
Proceedings. Fifth Great Lakes Symposium on VLSI
1995
Corpus ID: 3154017
Locally optimal breaking strategy was already developed for disjoint directed circuits in the vertical constraint graph. The…
Expand
1993
1993
Modeling the vertical constraints in VLSI channel routing
Antonije D. Jovanovic
[] Proceedings Third Great Lakes Symposium on…
1993
Corpus ID: 27407442
Demonstrates that the vertical constraint graph (VCG) is not a complete representation of the vertical constraints of a channel…
Expand
1991
1991
Algorithms for three-layer over-the-cell channel routing
N. D. Holmes
,
N. Sherwani
,
M. Sarrafzadeh
IEEE International Conference on Computer-Aided…
1991
Corpus ID: 40072751
The authors present a novel algorithm for three-layer, over-the-cell channel routing of standard cell designs. The novelty of the…
Expand
1991
1991
A hierarchical methodology to improve channel routing by pin permutation
C. Y. Hou
,
C. Y. Chen
IEEE International Conference on Computer-Aided…
1991
Corpus ID: 19100137
A hierarchical pin permutation algorithm is presented which is used as a preprocessor of conventional channel routing algorithms…
Expand
1991
1991
New results on channel routing
Tai-Tsung Ho
,
S. Iyengar
[] Proceedings. Fourth CSI/IEEE International…
1991
Corpus ID: 86241734
Presents a new routing concept which guides the selection of wire segments in track-by-track fashion by inspecting the effects of…
Expand
1988
1988
Two NP-hard interchangeable terminal problems
S. Sahni
,
San-Yuan Wu
IEEE Trans. Comput. Aided Des. Integr. Circuits…
1988
Corpus ID: 2784
Two subproblems that arise when routing channels with interchangeable terminals are shown to be NP-hard. These problems are: (1…
Expand
1987
1987
A Mixed HVH-VHV Algorithm for Three-Layer Channel Routing
V. Pitchumani
,
Q. Zhang
IEEE Transactions on Computer-Aided Design of…
1987
Corpus ID: 13951570
We present a hybrid three-layer channel-routing algorithm that combines horizontal-vertical-horizontal (HVH) and vertical…
Expand
1985
1985
A Method of Improving the Terminal Assignment in the Channel Routing for Gate Arrays
M. Terai
IEEE Transactions on Computer-Aided Design of…
1985
Corpus ID: 15465353
The channel router, which routes a rectangular channel with two rows of terminals along its top and bottom sides, is extensively…
Expand
1983
1983
General channel-routing algorithm
M. Marek-Sadowska
,
E. Kuh
1983
Corpus ID: 62107968
A new approach to the 2-layer channel-routing problem is introduced. The method allows horizontal and vertical connections on…
Expand
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE