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Instruction cycle

Known as: Computer cycle, FE Cycle, Cycle 
An instruction cycle (sometimes called a fetch–decode–execute cycle) is the basic operational process of a computer. It is the process by which a… 
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Related topics

Related topics

31 relations
Address generation unitArithmetic logic unitBarrel processorBooting

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2003
2003
Quality of service in an information economy
Accessing and processing distributed data sources have become important factors for businesses today. This is especially true for… 
2002
2002
A fast maximum-likelihood decoder for convolutional codes
The lazy Viterbi decoder is a maximum-likelihood decoder for block and stream convolutional codes. For many codes of practical… 
1998
1998
Reducing power consumption of dedicated processors through instruction set encoding
With the increased clock frequency of modern, high-performance processors (over 500 MHz, in some cases), limiting the power… 
1994
1994
The effect of speculative execution on cache performance
Superscalar microprocessors obtain high performance by exploiting parallelism at the instruction level. To effectively use the… 
1992
1992
Design of the IBM Enterprise System/9000 high-end processor
The “high-end” water-cooled processors in the IBM Enterprise System/9000™ product family use a CPU organization and cache… 
Highly Cited
1991
Highly Cited
1991
Efficient VLSI designs for data transformation of tree-based codes
A class of VLSI architectures for data transformation of tree-based codes is proposed, concentrating on transformation functions… 
1990
1990
History, an intelligent load sharing filter
  • A. Svensson
  • Proceedings.,10th International Conference on…
  • 1990
  • Corpus ID: 9866439
The author proposes a filter component to be included in a load-sharing algorithm to detect short-lived jobs not worth… 
Review
1988
Review
1988
The Horizon supercomputing system: architecture and software
An overview is given of Horizon, a shared-memory multiple-instruction-stream-multiple-data-stream computer architecture currently… 
1985
1985
SEU Vulnerability of the Zilog Z-80 and NSC-800 Microprocessors
A detailed analysis of the SEU vulnerability of the Zilog Z-80 microprocessor is presented based upon data obtained with heavy… 
1967
1967
The IBM system/360 model 91: storage system
This paper discusses the design concepts employed in the development of the IBM System/360 Model 91 storage system. Particular… 
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