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LECTOR: a technique for leakage reduction in CMOS circuits
In CMOS circuits, the reduction of the threshold voltage due to voltage scaling leads to increase in subthreshold leakage current and hence static power dissipation. Expand
Design of reversible sequential circuits optimizing quantum cost, delay, and garbage outputs
In this work, we present novel designs of reversible sequential circuits that are optimized in terms of quantum cost, delay and the garbage outputs. Expand
JAGUAR: a fully pipelined VLSI architecture for JPEG image compression standard
In this paper, we describe a fully pipelined single chip VLSI architecture for implementing JPEG baseline image compression standard. Expand
Design of a Reversible ALU Based on Novel Programmable Reversible Logic Gate Structures
We propose two programmable reversible logic gate structures targeted at ALU implementation and their use in the realization of an efficient reversible ALU is demonstrated. Expand
Design of Efficient Reversible Binary Subtractors Based on a New Reversible Gate
Proposed TR gate is better for designing reversible binary subtractor compared to such gates discussed in literature in terms of quantum cost, garbage outputs and complexity. Expand
Gabor filter-based edge detection
In this paper, the performance of a Gabor odd filter-based edge detector is investigated using the measures proposed by Canny. Expand
Mach-Zehnder interferometer based design of all optical reversible binary adder
In recent years reversible logic has emerged as a promising computing model for applications in dissipation less optical computing, low power CMOS, quantum computing, etc. Expand
Conservative QCA Gate (CQCA) for Designing Concurrently Testable Molecular QCA Circuits
We present a novel conservative logic gate termed 'CQCA' (conservative QCA) to design concurrently testable circuits for molecular QCA. Expand
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits
Low-Power High-Level Synthesis for Nanoscale CMOS Circuits addresses the need for analysis, characterization, estimation, and optimization of the various forms of power dissipation in the presence ofExpand
A new design of the reversible subtractor circuit
In this work, we present a new design of the reversible half subtractor based on the quantum gates implementation of the new reversible TR gate. Expand