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Erasable programmable logic device
Known as:
EPLD
An Erasable programmable logic device (EPLD) is an integrated circuit that comprises an array of programmable logic devices (PLD) that do not come…
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Related topics
Related topics
6 relations
Complex programmable logic device
Field-programmable gate array
Generic array logic
Macrocell array
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Growth and characterisation of Au Colloid catalysed zinc oxide nanowires.
M. Lynam
2017
Corpus ID: 104267623
This thesis concerns new and in-depth research into the use of eclipse pulsed laser deposition (EPLD) to grow ZnO and ZnMgO…
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2009
2009
Photoluminescence of ZnO Grown by Eclipse Pulsed Laser deposition
R. Mendelsberg
2009
Corpus ID: 137431392
ZnO thin films and nanostructures were grown by eclipse pulsed laser deposition (EPLD) for the first time. On bare sapphire held…
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2008
2008
Method for remote downloading erasable programming logic device EPLD
Xin-Zhu Su
2008
Corpus ID: 64643447
The invention provides a method for remotely downloading an erasable programmable logic device (EPLD), which is characterized in…
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2007
2007
Analysis & Design of IRIG-B Encoder/Decoder Based on EPLD
Yu-Qing Shi
2007
Corpus ID: 63420994
IRIG-B code is a kind of telemetry time standard used in China.Through studying of IRIG-B code and using EPLD design method,IRIG…
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2005
2005
The implementation of a system for signal test and analysis through DDS, EPLD and virtual instruments
Ming Lu
2005
Corpus ID: 114211876
For practical engineering application, a multifunctional system for signal test and analysis based on DDS, EPLD and virtual…
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2000
2000
The Real-time Digital Image Dispaly Circuit Implemented By Microprocessor & EPLD
A. Key
2000
Corpus ID: 63504461
This paper introduces an approach that design the Real time Digital Image Display Circuit implemented by microprocessor EPLD.This…
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1993
1993
PARTITIONING APPROACH TO F"D AN EXACT SOLUTION EPLD DEVICE TO THE F"G PROBLEM IN AN APPLICATION-SPECIFIC
M. Chrzanowska-Jeske
1993
Corpus ID: 122987015
This paper presents a new routing-driven partitioning approach for fitting a sequential circuit onto limitedconnectivity EPLDs…
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1991
1991
Real time and low cost image processing architecture based on programmable logic devices (PLD)
L. Nozal
,
S. Lorenzo
,
R. Boucho
,
M. Shaban
Proceedings IROS '91:IEEE/RSJ International…
1991
Corpus ID: 20003509
Shows how an image processing architecture can be efficiently made with structures based on programmable logic devices (PLD) and…
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1990
1990
Starting Circuit For Erasable Programmable Logic Device
S. Cole
1990
Corpus ID: 56685868
Voltage regulator bypassed to supply starting current. Starting or "pullup" circuit supplies large inrush of current required by…
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1986
1986
A 19-ns 250-mW CMOS erasable programmable logic device
J. Pathak
,
H. Kurkowski
,
R. Pugh
,
R. Shrivastava
,
F. Jenne
1986
Corpus ID: 61014584
A 19-ns 250-mW erasable programmable logic device using 1.2-/spl mu/m n-well CMOS EPROM technology is described. CMOS EPROM…
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