Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 226,119,078 papers from all fields of science
Search
Sign In
Create Free Account
Circuit minimization for Boolean functions
Known as:
Circuit minimization
, Logic circuit minimization
, Boolean minimization
Expand
In Boolean algebra, circuit minimization is the problem of obtaining the smallest logic circuit (Boolean formula) that represents a given Boolean…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
17 relations
AND gate
Binary decision diagram
Circuit underutilization
Electronic circuit
Expand
Broader (3)
Boolean algebra
Circuit complexity
Logic in computer science
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Efficient lq norm based sparse subspace clustering via smooth IRLS and ADMM
Shenfen Kuang
,
Hongyang Chao
,
Jun Yang
Multimedia tools and applications
2017
Corpus ID: 410857
Recently, sparse subspace clustering, as a subspace learning technique, has been successfully applied to several computer vision…
Expand
2008
2008
Source term estimation using convex optimization
Yang Cheng
,
T. Singh
Fusion
2008
Corpus ID: 14895351
A computationally efficient, grid-based estimation method is presented for multiple source identification from distributed sensor…
Expand
2003
2003
Fast computation of symmetries in Boolean functions
A. Mishchenko
IEEE Trans. Comput. Aided Des. Integr. Circuits…
2003
Corpus ID: 15606244
Symmetry detection in completely specified Boolean functions is important for several applications in logic synthesis, technology…
Expand
1996
1996
Automatic synthesis of extended burst-mode circuits using generalized C-elements
K. Yun
Proceedings EURO-DAC '96. European Design…
1996
Corpus ID: 12629851
Presents a new automatic synthesis technique for extended burst-mode circuits, a class of asynchronous circuits that allows…
Expand
Highly Cited
1992
Highly Cited
1992
Automatic synthesis of 3D asynchronous state machines
K. Yun
,
D. Dill
IEEE/ACM International Conference on Computer…
1992
Corpus ID: 13464498
An automatic synthesis tool (3D) for designing asynchronous controllers from burst-mode specifications, a class of specifications…
Expand
Highly Cited
1991
Highly Cited
1991
Synthesis of asynchronous state machines using a local clock
S. Nowick
,
D. Dill
[ Proceedings] IEEE International Conference on…
1991
Corpus ID: 677779
A novel, correct design methodology for asynchronous state-machine controllers is presented. The goal of this work is a design…
Expand
1991
1991
On the Relationship between Abductive Reasoning and Boolean Minimization
V. Dasigi
,
K. Thirunarayan
1991
Corpus ID: 10663290
Abductive reasoning involves determining a parsimonious set of explanations that can account for a set of observations. In the…
Expand
1988
1988
Verification algorithms for VLSI synthesis
G. Hachtel
,
R. Jacoby
IEEE Trans. Comput. Aided Des. Integr. Circuits…
1988
Corpus ID: 33470750
A description is given of a theory for, and the application of, a general algorithm for determining whether a given multilevel…
Expand
Highly Cited
1987
Highly Cited
1987
A Minimizing Algorithm for Sum of Disjoint Products
M. O. Locks
IEEE Transactions on Reliability
1987
Corpus ID: 25852738
This paper describes a minimizing version of the Abraham sum-of-disjoint products (sdp) algorithm, called the Abraham-Locks…
Expand
Highly Cited
1986
Highly Cited
1986
McBOOLE: A New Procedure for Exact Logic Minimization
M. Dagenais
,
V. Agarwal
,
N. Rumin
IEEE Transactions on Computer-Aided Design of…
1986
Corpus ID: 10077602
A new logic minimization algorithm is presented. It finds a minimal cover for a multiple-output boolean function expressed as a…
Expand
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE