Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 218,254,486 papers from all fields of science
Search
Sign In
Create Free Account
Circuit minimization for Boolean functions
Known as:
Circuit minimization
, Logic circuit minimization
, Boolean minimization
Expand
In Boolean algebra, circuit minimization is the problem of obtaining the smallest logic circuit (Boolean formula) that represents a given Boolean…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
17 relations
AND gate
Binary decision diagram
Circuit underutilization
Electronic circuit
Expand
Broader (3)
Boolean algebra
Circuit complexity
Logic in computer science
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2018
Highly Cited
2018
Scheduling Policies for Age Minimization in Wireless Networks with Unknown Channel State
Rajat Talak
,
I. Kadota
,
S. Karaman
,
E. Modiano
International Symposium on Information Theory
2018
Corpus ID: 21692673
Age of information (AoI) is a recently proposed metric that measures the time elapsed since the generation of the last received…
Expand
Highly Cited
2008
Highly Cited
2008
Minimizing Disjunctive Normal Form Formulas and AC0 Circuits Given a Truth Table
Eric Allender
,
L. Hellerstein
,
Paul McCabe
,
T. Pitassi
,
M. Saks
SIAM journal on computing (Print)
2008
Corpus ID: 19840826
For circuit classes $R$, the fundamental computational problem Min-R asks for the minimum $R$-size of a Boolean function…
Expand
Highly Cited
2008
Highly Cited
2008
Optimal complexity reduction of polyhedral piecewise affine systems
Tobias Geyer
,
F. D. Torrisi
,
M. Morari
at - Automatisierungstechnik
2008
Corpus ID: 14525361
Highly Cited
1991
Highly Cited
1991
On variable ordering of binary decision diagrams for the application of multi-level logic synthesis
M. Fujita
,
Y. Matsunaga
,
Taeko Kakuda
Proceedings of the European Conference on Design…
1991
Corpus ID: 26892528
Develops multi-level logic minimization programs using binary decision diagram (BDD). The authors present variable ordering…
Expand
Highly Cited
1990
Highly Cited
1990
Retiming and resynthesis: optimizing sequential networks with combinational techniques
S. Malik
,
E. Sentovich
,
R. Brayton
,
A. Sangiovanni-Vincentelli
Twenty-Third Annual Hawaii International…
1990
Corpus ID: 2471264
A technique is proposed for optimizing a sequential network by moving the registers to the boundary of the network using an…
Expand
Highly Cited
1989
Highly Cited
1989
NOVA: State Assignment of Finite State Machines for Optimal Two-Level Logic Implementations
T. Villa
,
A. Sangiovanni-Vincentelli
26th ACM/IEEE Design Automation Conference
1989
Corpus ID: 16615271
The problem of encoding the states of a synchronous Finite State Machine (FSM), so that the area of a two-level implementation of…
Expand
Highly Cited
1989
Highly Cited
1989
On the Relationship Between Circumscription and Negation as Failure
M. Gelfond
,
H. Przymusinska
,
Teodor C. Przymusinski
Artificial Intelligence
1989
Corpus ID: 32789524
Highly Cited
1987
Highly Cited
1987
A Minimizing Algorithm for Sum of Disjoint Products
M. O. Locks
IEEE Transactions on Reliability
1987
Corpus ID: 25852738
This paper describes a minimizing version of the Abraham sum-of-disjoint products (sdp) algorithm, called the Abraham-Locks…
Expand
Highly Cited
1985
Highly Cited
1985
Optimal State Assignment for Finite State Machines
G. Micheli
,
R. Brayton
,
A. Sangiovanni-Vincentelli
IEEE Transactions on Computer-Aided Design of…
1985
Corpus ID: 33242718
Computer-Aided synthesis of sequential functions of VLSI systems, such as microprocessor control units, must include design…
Expand
Highly Cited
1984
Highly Cited
1984
Cascode voltage switch logic: A differential CMOS logic family
L. Heller
,
W. R. Griffin
,
James W Davis
,
Nandor G Thorna
IEEE International Solid-State Circuits…
1984
Corpus ID: 33920505
A differential CMOS Logic family that is well suited to automated logic minimization and placement and routing techniques, yet…
Expand
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE