Skip to search formSkip to main contentSkip to account menu

Address decoder

In digital electronics, an address decoder is a binary decoder that has two or more inputs for address bits and one or more outputs for device… 
Wikipedia (opens in a new tab)

Related topics

Related topics

18 relations
Address busApplication-specific integrated circuitBinary decoderBus (computing)

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2015
Highly Cited
2015
RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme
The Resistive Random Access Memory (RRAM) is a new type of non-volatile memory based on the resistive memory device. Researchers… 
2012
2012
The l1 penalized decoder and its reweighted LP
Linear programming (LP) decoding for low density parity check (LDPC) codes proposed by Feldman et al. has attracted considerable… 
2009
2009
A Trojan-resistant system-on-chip bus architecture
Communications systems are increasingly reliant on system-on-chip (SoC) solutions. As the complexity and size of SoCs continues… 
Highly Cited
2008
Highly Cited
2008
Low-Power 2.4 GHz Wake-Up Radio for Wireless Sensor Networks
Power consumption is a critical issue in many wireless sensor network scenarios where network life expectancy is measured in… 
Highly Cited
2008
Highly Cited
2008
Leakage Minimization of SRAM Cells in a Dual-Vt and Dual-Tox Technology
Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in deep… 
Highly Cited
2007
Highly Cited
2007
Segmented Virtual Ground Architecture for Low-Power Embedded SRAM
A new scheme to reduce the power consumption of static random access memories is presented. It is shown that using segmented… 
Highly Cited
2006
Highly Cited
2006
Reducing the Sub-threshold and Gate-tunneling Leakage of SRAM Cells using Dual-Vt and Dual-Tox Assignment
Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in very deep… 
2005
2005
Subthreshold leakage current reduction techniques for static random access memory
The two main sources of power dissipation in CMOS circuits are dynamic and static power dissipation. Static power dissipation is… 
2004
2004
Detecting faults in the peripheral circuits and an evaluation of SRAM tests
Very little has been published on faults in the memory peripheral circuits, denoted as 'PFs'. This work shows that PFs are… 
Highly Cited
2001
Highly Cited
2001
Very high quality image restoration by combining wavelets and curvelets
We outline digital implementations of two newly developed multiscale representation systems, namely, the ridgelet and curvelet… 
By clicking accept or continuing to use the site, you agree to the terms outlined in our Privacy Policy (opens in a new tab), Terms of Service (opens in a new tab), and Dataset License (opens in a new tab)