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Address decoder
In digital electronics, an address decoder is a binary decoder that has two or more inputs for address bits and one or more outputs for device…
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Related topics
Related topics
18 relations
Address bus
Application-specific integrated circuit
Binary decoder
Bus (computing)
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2015
Highly Cited
2015
RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme
Ching-Yi Chen
,
Hsiu-Chuan Shih
,
+4 authors
Frederick T. Chen
IEEE transactions on computers
2015
Corpus ID: 2023317
The Resistive Random Access Memory (RRAM) is a new type of non-volatile memory based on the resistive memory device. Researchers…
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2012
2012
The l1 penalized decoder and its reweighted LP
Xishuo Liu
,
S. Draper
,
B. Recht
Allerton Conference on Communication, Control…
2012
Corpus ID: 17755351
Linear programming (LP) decoding for low density parity check (LDPC) codes proposed by Feldman et al. has attracted considerable…
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2009
2009
A Trojan-resistant system-on-chip bus architecture
Lok-Won Kim
,
J. Villasenor
,
Ç. Koç
IEEE Military Communications Conference
2009
Corpus ID: 26662
Communications systems are increasingly reliant on system-on-chip (SoC) solutions. As the complexity and size of SoCs continues…
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Highly Cited
2008
Highly Cited
2008
Low-Power 2.4 GHz Wake-Up Radio for Wireless Sensor Networks
P. Le-Huy
,
Sébastien Roy
IEEE International Conference on Wireless and…
2008
Corpus ID: 16171278
Power consumption is a critical issue in many wireless sensor network scenarios where network life expectancy is measured in…
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Highly Cited
2008
Highly Cited
2008
Leakage Minimization of SRAM Cells in a Dual-Vt and Dual-Tox Technology
B. Amelifard
,
F. Fallah
,
Massoud Pedram
IEEE Transactions on Very Large Scale Integration…
2008
Corpus ID: 2935984
Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in deep…
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Highly Cited
2007
Highly Cited
2007
Segmented Virtual Ground Architecture for Low-Power Embedded SRAM
M. Sharifkhani
,
M. Sachdev
IEEE Transactions on Very Large Scale Integration…
2007
Corpus ID: 29049993
A new scheme to reduce the power consumption of static random access memories is presented. It is shown that using segmented…
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Highly Cited
2006
Highly Cited
2006
Reducing the Sub-threshold and Gate-tunneling Leakage of SRAM Cells using Dual-Vt and Dual-Tox Assignment
B. Amelifard
,
F. Fallah
,
Massoud Pedram
Proceedings of the Design Automation & Test in…
2006
Corpus ID: 2713658
Aggressive CMOS scaling results in low threshold voltage and thin oxide thickness for transistors manufactured in very deep…
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2005
2005
Subthreshold leakage current reduction techniques for static random access memory
D. Fitrio
,
A. Stojcevski
,
Jugdutt Singh
SPIE Micro + Nano Materials, Devices, and…
2005
Corpus ID: 55961442
The two main sources of power dissipation in CMOS circuits are dynamic and static power dissipation. Static power dissipation is…
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2004
2004
Detecting faults in the peripheral circuits and an evaluation of SRAM tests
A. V. Goor
,
S. Hamdioui
,
R. Wadsworth
International Conferce on Test
2004
Corpus ID: 17691932
Very little has been published on faults in the memory peripheral circuits, denoted as 'PFs'. This work shows that PFs are…
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Highly Cited
2001
Highly Cited
2001
Very high quality image restoration by combining wavelets and curvelets
Jean-Luc Starck
,
D. Donoho
,
E. Candès
SPIE Optics + Photonics
2001
Corpus ID: 19024618
We outline digital implementations of two newly developed multiscale representation systems, namely, the ridgelet and curvelet…
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