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Acid Sensing Ion Channel Blockers

Known as: ASIC Channel Antagonists, ASIC Channel Blockers, ASIC Blockers 
A subclass of sodium channel blockers that are specific for ACID-SENSING SODIUM CHANNELS.
National Institutes of Health

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AmiloridePcTX1 protein, Psalmopoeus cambridgeiethylisopropylamiloride
In Bloodaspects of radiation effectschemical synthesisstandards characteristics

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
A 290 mV Sub- $V_{\rm T}$ ASIC for Real-Time Atrial Fibrillation Detection
A real-time detector for episodes of atrial fibrillation is fabricated as an application specific integrated circuit (ASIC). The… 
2011
2011
Silicon Implementation of SHA-3 Finalists : BLAKE , Grøstl , JH , Keccak and Skein
Hardware implementation quality is an important factor in selecting the NIST SHA-3 competition finalists. However, a… 
2005
2005
Design of a High-Performance Scalable CDMA Router for On-Chip Switched Networks
Performance results and synthesized area overhead for a code division multiple access (CDMA) router intended for network-on-chip… 
2005
2005
CZT detectors read out with the RENA-2 ASIC
Multiple-site interactions initiated by Compton scattering are the primary interaction processes of gamma-rays in CZT in ~0.2… 
2001
2001
Testing FPGA Devices Using JBits
Unlike other integrated circuits, SRAM-based FPGA devices present a unique problem for testing. Because of their high level of… 
Highly Cited
2000
Highly Cited
2000
G-link and gigabit Ethernet compliant serializer for LHC data transmission
Gbit/s data transmission links will be used in several LHC detectors in trigger and data acquisition systems. In these… 
2000
2000
Chip-level simulation for CDM failures in multi-power ICs
This paper presents a new chip-level simulation methodology for charged-device model (CDM) failure analysis in multi-power ICs. A… 
1999
1999
The silicon tracker/converter for the gamma-ray large area space telescope
1995
1995
Area-efficient CMOS output buffer with enhanced high ESD reliability for deep submicron CMOS ASIC
There are one PTLSCR and one NTLSCR devices in parallel with output PMOS and NMOS devices, respectively, to improve ESD… 
1990
1990
Boundary-scan design principles for efficient LSSD ASIC testing
A boundary-scan logic design method that depends only on level-sensitive scan design (LSSD) principles has been developed for IBM… 
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