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1-bit architecture

Known as: 1 bit, 1-bit 
A 1-bit computer architecture is an instruction set architecture for a processor that has datapath widths and data register widths of 1 bit (1/8… Expand
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Papers overview

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Highly Cited
2014
Highly Cited
2014
We show empirically that in SGD training of deep neural networks, one can, at no or nearly no loss of accuracy, quantize the… Expand
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Highly Cited
2014
Highly Cited
2014
We investigate massive multiple-input-multiple output (MIMO) uplink systems with 1-bit analog-to-digital converters (ADCs) on… Expand
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Highly Cited
2013
Highly Cited
2013
The compressive sensing (CS) framework aims to ease the burden on analog-to-digital converters (ADCs) by reducing the sampling… Expand
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Highly Cited
2013
Highly Cited
2013
Minimization with orthogonality constraints (e.g., $$X^\top X = I$$) and/or spherical constraints (e.g., $$\Vert x\Vert _2 = 1… Expand
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Highly Cited
2013
Highly Cited
2013
This paper develops theoretical results regarding noisy 1-bit compressed sensing and sparse binomial regression. We demonstrate… Expand
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Highly Cited
2010
Highly Cited
2010
An all-printed rectifier that can provide at least 10 V dc from a 13.56-MHz radio frequency identification (RFID) reader and an… Expand
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Highly Cited
2008
Highly Cited
2008
Compressive sensing is a new signal acquisition technology with the potential to reduce the number of measurements required to… Expand
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Highly Cited
2007
Highly Cited
2007
We study the performance of multi-input multi-output (MIMO) channels with coarsely quantized outputs in the low signal-to-noise… Expand
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Highly Cited
2002
Highly Cited
2002
A performance analysis of 1-bit full-adder cell is presented. The adder cell is anatomized into smaller modules. The modules are… Expand
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Highly Cited
1979
Highly Cited
1979
Let <italic>M</italic> &equil; {0, 1, 2, ..., <italic>m</italic>—1} , <italic>N</italic> &equil; {0, 1, 2,..., <italic>n</italic… Expand
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