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Write buffer
Known as:
Victim buffer
A write buffer is a type of data buffer used in certain CPU cache architectures like Intel's x86 and AMD64. In multi-core systems, write buffers…
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Related topics
Related topics
10 relations
C11 (C standard revision)
CPU cache
Computer data storage
Data buffer
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Broader (1)
Computer memory
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
Prototyping Formal System Models with Active Objects
Eduard Kamburjan
,
Reiner Hähnle
International Conference on Information and…
2018
Corpus ID: 52926759
We propose active object languages as a development tool for formal system models of distributed systems. Additionally to a…
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2011
2011
POPS: Coherence Protocol Optimization for Both Private and Shared Data
Hemayet Hossain
,
S. Dwarkadas
,
Michael C. Huang
International Conference on Parallel…
2011
Corpus ID: 16486020
As the number of cores in a chip multiprocessor (CMP) increases, the need for larger on-chip caches also increases in order to…
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2010
2010
Write buffer-oriented energy reduction in the L1 data cache of two-level caches for the embedded system
Soontae Kim
,
Jongmin Lee
ACM Great Lakes Symposium on VLSI
2010
Corpus ID: 2639678
In resource-constrained embedded systems, on-chip cache memories play an important role in both performance and energy…
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2010
2010
Buffer flush and address mapping scheme for flash memory solid-state disk
Hyunchul Park
,
Dongkun Shin
Journal of systems architecture
2010
Corpus ID: 3184216
2010
2010
High Performance Multi-Node File Copies and Checksums for Clustered File Systems
Paul Z. Kolano
,
R. Ciotti
LiSA
2010
Corpus ID: 8788414
Mcp and msum are drop-in replacements for the standard cp and md5sum programs that utilize multiple types of parallelism and…
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2007
2007
Specifying memory consistency of write buffer multiprocessors
Lisa Higham
,
L. Jackson
,
J. Kawash
TOCS
2007
Corpus ID: 9262157
Write buffering is one of many successful mechanisms that improves the performance and scalability of multiprocessors. However…
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2007
2007
Performance analysis of a channel allocation scheme for multi‐service mobile cellular networks
Shensheng Tang
,
W. Li
International Journal of Communication Systems
2007
Corpus ID: 12935818
This paper presents a new channel allocation scheme, namely the dynamic partition with pre‐emptive priority (DPPP) scheme, for…
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2006
2006
An adaptive bandwidth allocation scheme with preemptive priority for integrated voice/data mobile networks
Shensheng Tang
,
W. Li
IEEE Transactions on Wireless Communications
2006
Corpus ID: 227978
This paper presents an adaptive bandwidth allocation scheme, called complete sharing with preemptive priority (CSPP) scheme, for…
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1999
1999
Power/performance advantages of victim buffer in high-performance processors
Gianluca Albera
,
Ivet Bahar
Proceedings IEEE Alessandro Volta Memorial…
1999
Corpus ID: 18753293
In this paper, we propose several different data cache configurations and analyze their power as well as performance implications…
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1991
1991
Writes caches as an alternative to write buffers
B. Bray
,
M. Flynn
1991
Corpus ID: 59677199
Write buffers help unbind one level of a memory hierarchy from the next, thus write buffers are used to reduce write stalls…
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