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Trace scheduling

Trace scheduling is an optimization technique used in compilers for computer programs. A compiler often can, by rearranging its generated machine… Expand
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Related topics

Related topics

5 relations
Instruction schedulingLoop unrollingMultiflowST200 family
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Warp-aware trace scheduling for GPUs
GPU performance depends not only on thread/warp level parallelism (TLP) but also on instruction-level parallelism (ILP). It is… Expand
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Highly Cited
2005
Highly Cited
2005
The multiflow trace scheduling compiler
The Multiflow compiler uses the trace scheduling algorithm to find and exploit instruction-level parallelism beyond basic blocks… Expand
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Highly Cited
2004
Highly Cited
2004
Software pipelining: an effective scheduling technique for VLIW machines
  • M. Lam
  • SIGP
  • 2004
    • Corpus ID: 52798114
The basic idea behind software pipelining was first developed by Patel and Davidson for scheduling hardware pipe-lines. As… Expand
Highly Cited
1994
Highly Cited
1994
Complexity/performance tradeoffs with non-blocking loads
Non-blocking loads are a very effective technique for tolerating the cache-miss latency on data cache references. In this paper… Expand
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1993
1993
Hardware and software for functional and fine grain parallelism
This thesis examines nonloop parallelism at both fine and coarse levels of granularity in numerical FORTRAN programs… Expand
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Highly Cited
1990
Highly Cited
1990
Multiple instruction issue in the NonStop cyclone processor
This paper describes the architecture for issuing multiple instructions per clock in the NonStop Cyclone Processor. Pairs of… Expand
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Highly Cited
1987
Highly Cited
1987
A VLIW architecture for a trace scheduling compiler
Very Long Instruction Word (VLIW) architectures were promised to deliver far more than the factor of two or three that current… Expand
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Highly Cited
1987
Highly Cited
1987
A VLIW architecture for a trace scheduling compiler
Very Long Instruction Word (VLIW) architectures were promised to deliver far more than the factor of two or three that current… Expand
1987
1987
A VLIW architecture for a trace scheduling compiler
Very Long Instruction Word (VLIW) architectures were promised to deliver far more than the factor of two or three that current… Expand
Highly Cited
1981
Highly Cited
1981
Trace Scheduling: A Technique for Global Microcode Compaction
  • J. A. Fisher
  • IEEE Transactions on Computers
  • 1981
    • Corpus ID: 1650655
Microcode compaction is the conversion of sequential microcode into efficient parallel (horizontal) microcode. Local compaction… Expand
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