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Instruction scheduling

In computer science, instruction scheduling is a compiler optimization used to improve instruction-level parallelism, which improves performance on… 
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Related topics

Related topics

20 relations
Aliasing (computing)Assembly languageBasic blockCode generation (compiler)

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Evaluating the Design of a VLIW Processor for Real-Time Systems
Nowadays, many real-time applications are very complex and as the complexity and the requirements of those systems become more… 
2012
2012
Using Innovative Technical Solutions as an Intervention for at Risk Students: A Meta-Cognitive Statistical Analysis to Determine the Impact of Ninth Grade Freshman Academies, Centers, and Center…
This paper provides an active discourse on the use of innovative solutions to conduct an in–depth investigation on the success… 
2004
2004
Exploring Wakeup-Free Instruction Scheduling
Design of wakeup-free issue queues is becoming desirable due to the increasing complexity associated with broadcast-based… 
2002
2002
Instruction Scheduling
  • Mike Lam
  • The Compiler Design Handbook, 2nd ed.
  • 2002
  • Corpus ID: 5169445
Reorder instructions to better fit target machine's pipeline • fill control transfer delay slots • avoid using result of multi… 
2000
2000
Improved spill code generation for software pipelined loops
Software pipelining is a loop scheduling technique that extractsparallelism out of loops by overlapping the execution of… 
2000
2000
Path Analysis and Renaming for Predicated Instruction Scheduling
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue… 
2000
2000
Stochastic instruction scheduling
Instruction scheduling is a code reordering transformation used to hide latencies present in modern day microprocessors… 
1996
1996
Instruction scheduling for the HP PA-8000
The PA-8000 is capable of reordering independent operations at run time, a task normally performed only by the instruction… 
Review
1991
Review
1991
Efficient DAG construction and heuristic calculation for instruction scheduling
A number of heuristic algorithms for DAG-based instruction scheduling have been proposed over the past few years. In this paper… 
1991
1991
Retargetable instruction scheduling for pipelined processors
Retargetable code generators for complex instruction set computers (CISCs) have focused on sophisticated pattern matching code… 
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