Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 228,397,756 papers from all fields of science
Search
Sign In
Create Free Account
Instruction scheduling
In computer science, instruction scheduling is a compiler optimization used to improve instruction-level parallelism, which improves performance on…
Expand
Wikipedia
(opens in a new tab)
Create Alert
Alert
Related topics
Related topics
20 relations
Aliasing (computing)
Assembly language
Basic block
Code generation (compiler)
Expand
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
Using Innovative Technical Solutions as an Intervention for at Risk Students: A Meta-Cognitive Statistical Analysis to Determine the Impact of Ninth Grade Freshman Academies, Centers, and Center…
J. E. Osler
,
Carl Waden
2012
Corpus ID: 51964357
This paper provides an active discourse on the use of innovative solutions to conduct an in–depth investigation on the success…
Expand
2006
2006
Energy-Efficient Dynamic Instruction Scheduling Logic through Instruction Grouping
Hiroshi Sasaki
,
Masaaki Kondo
,
Hiroshi Nakamura
ISLPED'06 Proceedings of the International…
2006
Corpus ID: 3156635
Dynamic instruction scheduling logic is quite complex and dissipates significant energy in microprocessors that support…
Expand
2005
2005
Optimization of Time of Day Plan Scheduling Using a Multi-Objective Evolutionary Algorithm
M. Abbas
,
Anuj Sharma
2005
Corpus ID: 9366229
Coordinating traffic signals can provide great savings to motorists in terms of reduced delays and number of vehicular stops. In…
Expand
2004
2004
Exploring Wakeup-Free Instruction Scheduling
Jie S. Hu
,
N. Vijaykrishnan
,
M. J. Irwin
International Symposium on High-Performance…
2004
Corpus ID: 14468769
Design of wakeup-free issue queues is becoming desirable due to the increasing complexity associated with broadcast-based…
Expand
2002
2002
Instruction Scheduling
Mike Lam
The Compiler Design Handbook, 2nd ed.
2002
Corpus ID: 5169445
Reorder instructions to better fit target machine's pipeline • fill control transfer delay slots • avoid using result of multi…
Expand
2000
2000
Improved spill code generation for software pipelined loops
J. Zalamea
,
J. Llosa
,
E. Ayguadé
,
M. Valero
ACM-SIGPLAN Symposium on Programming Language…
2000
Corpus ID: 11632589
Software pipelining is a loop scheduling technique that extractsparallelism out of loops by overlapping the execution of…
Expand
1999
1999
Dependence Analysis for Java
C. Chambers
,
Igor Pechtchanski
,
Vivek Sarkar
,
M. Serrano
,
H. Srinivasan
International Workshop on Languages and Compilers…
1999
Corpus ID: 15228499
We describe a novel approach to performing data dependence analysis for Java in the presence of Java's "non-traditional" language…
Expand
1996
1996
Instruction scheduling for the HP PA-8000
David A. Dunn
,
W. Hsu
Proceedings of the 29th Annual IEEE/ACM…
1996
Corpus ID: 15368933
The PA-8000 is capable of reordering independent operations at run time, a task normally performed only by the instruction…
Expand
1995
1995
Enhancing instruction scheduling with a block-structured ISA
S. Melvin
,
Y. Patt
International journal of parallel programming
1995
Corpus ID: 13999124
It is now generally recognized that not enough parallelism exists within the small basic blocks of most general purpose programs…
Expand
Review
1991
Review
1991
Efficient DAG construction and heuristic calculation for instruction scheduling
M. Smotherman
,
Sanjay M. Krishnamurthy
,
P. Aravind
,
David Hunnicutt
MICRO 24
1991
Corpus ID: 416396
A number of heuristic algorithms for DAG-based instruction scheduling have been proposed over the past few years. In this paper…
Expand
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE