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Successive approximation ADC

Known as: Successive approximation register, SAR, Analog-to-digital conversion with SAR 
A successive approximation ADC is a type of analog-to-digital converter that converts a continuous analog waveform into a discrete digital… 
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Related topics

Related topics

16 relations
Analog signalAnalog-to-digital converterApproximationBinary search algorithm

Broader (1)

Digital signal processing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2011
Highly Cited
2011
All-Digital Background Calibration of a Successive Approximation ADC Using the “Split ADC” Architecture
The “split ADC” architecture enables fully digital calibration and correction of nonlinearity errors due to capacitor mismatch in… 
Highly Cited
2011
Highly Cited
2011
A SAR-Assisted Two-Stage Pipeline ADC
Successive approximation register (SAR) ADC architectures are popular for achieving high energy efficiency but they suffer from… 
Highly Cited
2010
Highly Cited
2010
A 1 GS/s 6 Bit 6.7 mW Successive Approximation ADC Using Asynchronous Processing
An asynchronous 6 bit 1 GS/s ADC is achieved by time interleaving two ADCs based on the binary successive approximation (SA… 
Highly Cited
2007
Highly Cited
2007
A 40–550 MHz Harmonic-Free All-Digital Delay-Locked Loop Using a Variable SAR Algorithm
A wide-range all-digital delay-locked loop (ADDLL) is presented to achieve low jitter, low power and process immunity. The… 
Highly Cited
2007
Highly Cited
2007
Dual Time-Interleaved Successive Approximation Register ADCs for an Ultra-Wideband Receiver
Ultra-wideband radio requires Nyquist sampling rates of at least 500 MS/s with low resolutions. While flash is the traditional… 
Highly Cited
2007
Highly Cited
2007
A 65-fJ/Conversion-Step 0.9-V 200-kS/s Rail-to-Rail 8-bit Successive Approximation ADC
An 8-bit successive approximation (SA) analog-to- digital converter (ADC) in 0.18 mum CMOS dedicated for energy-limited… 
2006
2006
An 8-bit 800-$muhboxW$1.23-MS/s Successive Approximation ADC in SOI CMOS
We report on an 8-bit successive approximation analog-to-digital converter (SA-ADC) that was designed and fabricated in 0.5-mum… 
Highly Cited
2002
Highly Cited
2002
A 1.2V 10b 20MSample/s non-binary successive approximation ADC in 0.13/spl mu/m CMOS
  • Franz Kuttner
  • IEEE International Solid-State Circuits…
  • 2002
  • Corpus ID: 33076359
A successive-approximation ADC with non-binary code achieves 55dB SNR at sampling frequencies up to 20MHz. The converter, with on… 
Highly Cited
2001
Highly Cited
2001
12 bit low power fully differential switched capacitor non-calibrating successive approximation ADC with 1MS/s
  • G. Promitzer
  • Proceedings of the 26th European Solid-State…
  • 2001
  • Corpus ID: 41092800
Based on a conventional successive approximation ADC architecture a new and faster solution is presented. The input structure of… 
Highly Cited
2000
Highly Cited
2000
A 1-V, 8-bit successive approximation ADC in standard CMOS process
A 1-V 8-bit 50-kS/s successive approximation analog-to-digital converter (ADC) implemented in a conventional 1.2-/spl mu/m CMOS… 
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