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Speedup

Known as: Ideal speedup, Cache effect, Linear speedup 
In computer architecture, speedup is a process for increasing the performance between two systems processing the same problem. More technically, it… 
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Papers overview

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Highly Cited
2012
Highly Cited
2012
The quadtree based picture partition scheme in HEVC contributes to significant coding efficiency improvement, especially for high… 
Highly Cited
2011
Highly Cited
2011
Exact recovery from contaminated visual data plays an important role in various tasks. By assuming the observed data matrix as… 
Highly Cited
2010
Highly Cited
2010
Hardware/software (HW/SW) partitioning is one of the key challenges in HW/SW codesign. This paper presents efficient algorithms… 
Highly Cited
2008
Highly Cited
2008
This paper presents a fast object class localization framework implemented on a data parallel architecture currently available in… 
Highly Cited
2007
Highly Cited
2007
With increasing time-to-market pressure and shortening semiconductor product cycles, more and more chips are being designed with… 
Review
2007
Review
2007
Although decimal arithmetic is widely used in commercial and financial applications, the related computations are handled in… 
Highly Cited
2000
Highly Cited
2000
A new algorithm for molecular dynamics simulations of biological macromolecules on parallel computers, point-centered domain… 
Highly Cited
1998
Highly Cited
1998
Three-dimensional pseudospectral modeling for a realistic scale problem is still computationally very intensive, even when using…