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Snoopy cache
In computing a snoopy cache is a type of memory cache that performs bus sniffing. The technique was introduced by Ravishankar and Goodman in 1983…
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Related topics
Related topics
4 relations
Bus snooping
Cache coherence
Fireplane
SGI Onyx
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2014
2014
Parallel Processing Shared Memory with Snoopy Cache
Kuntam Babu Rao
,
Dr. N Satyanarayana
2014
Corpus ID: 212545638
— Implementation of Parallel Processing with snoopy cache is an idea to enhance the performance of computing in real-time. When…
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2013
2013
Corrección de la mama tuberosa solo con implantes anatómicos
A. Rancati
,
Eduardo González
,
Julio Dorr
,
L. Vidal
,
M. Murias-Pettinari
,
M. Irigo
2013
Corpus ID: 72106523
Tuberous breasts, denominated like this by Rees and Aston, and also called areolar complex hernia by Bass, Snoopy deformity by…
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2008
2008
Using supplier locality in power-aware interconnects and caches in chip multiprocessors
E. Atoofian
,
A. Baniasadi
Journal of systems architecture
2008
Corpus ID: 14044305
2007
2007
Huelgas, Mailer y Snoopy
Inocencio F. Arias
2007
Corpus ID: 180453113
2004
2004
MLIST : AN EFFICIENT PENDING EVENT SET STRUCTURE FOR DISCRETE EVENT SIMULATION
R. Goh
,
I. Thng
2004
Corpus ID: 14180363
In discrete event simulation (DES), the priority queue structure for managing the pending event set (PES) of the DES is known to…
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1999
1999
Instruction-driven wake-up mechanisms for Snoopy TAP controller
D. Bhattacharya
Proceedings of the ... IEEE VLSI Test Symposium
1999
Corpus ID: 35571310
The issue of handling multiple embedded 1149.1-compliant TAP controllers (as part of embedded cores) in a 1149.1-compliant IC…
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1993
1993
Cache coherence for shared memory multiprocessors based on virtual memory support
K. Petersen
,
Kai Li
[] Proceedings Seventh International Parallel…
1993
Corpus ID: 15762740
This paper presents a software cache coherence scheme that uses virtual memory (VM) support to maintain cache coherency for…
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1993
1993
Synchronization, coherence, and consistency for high performance shared memory multiprocessing
S. Dwarkadas
1993
Corpus ID: 64304843
Although improved device technology has increased the performance of computer systems , fundamental hardware limitations and the…
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1992
1992
Analysis of directory based cache coherence schemes with multistage networks
Ashwini K. Nanda
,
Hong Jiang
International Conference on Scientific Computing
1992
Corpus ID: 15193588
Designing efficient cache coherence schemes for shared memory multiprocessors has attracted much attention of the researchers in…
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1991
1991
Multistage bus network (MBN): an interconnection network for cache coherent multiprocessors
L. Bhuyan
,
Ashwini K. Nanda
Proceedings of the Third IEEE Symposium on…
1991
Corpus ID: 18413970
Single bus multiprocessor systems do not scale well due to the limited bandwidth of the bus. Hierarchical bus interconnections…
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