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Smart Cache

Smart Cache is a level 2 or level 3 caching method for multiple execution cores, developed by Intel. Smart Cache shares the actual cache memory… 
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Related topics

Related topics

11 relations
CPU cacheHaswell (microarchitecture)List of Intel Celeron microprocessorsList of Intel Core i3 microprocessors

Broader (3)

Cache (computing)Central processing unitComputer memory

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Smart-Cache: Optimising Memory Accesses for Arbitrary Boundaries and Stencils on FPGAs
A key requirement for high performance on FPGAs is to maintain continuous data streaming from the DRAM. An impediment in many… 
2019
2019
A Smart Cache Strategy for Tag-Based Browsing of Digital Collections
Tag-based browsing is a common interaction technique in business, the culture industry and many other domains. According to this… 
2019
2019
A Case for Two-stage Inference with Knowledge Caching
Real-world intelligent services employing deep learning technology typically take a two-tier system architecture -- a dumb front… 
2012
2012
NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution
Soft processors often use data caches to reduce the gap between processor and main memory speeds. To achieve high efficiency… 
2012
2012
A Smart Cache Designed for Embedded Applications
In this paper, we extend our previous investigation of split array and scalar data caches to embedded systems. More specifically… 
2011
2011
A reconfigurable cache architecture for energy efficiency
On-chip caches often consume a significant fraction of the total processor energy budget. Allowing adaptation to the running… 
Review
2011
Review
2011
A Parallel Transaction-Level Model of H.264 Video Decoder
H.264 video decoder is a computationally demanding application. In resource-limited embedded environment, it is desirable to… 
1998
1998
User-oriented smart-cache for the Web: what you seek is what you get!
Standard database approaches to querying information on the Web focus on the source(s) and provide a query language based on a… 
1995
1995
A 2.25 gbytes/s 1 Mbit smart cache SRAM
The wide-word architecture is widely regionized as the next generation CPU architecture by most of the system vendors. This type… 
Review
1991
Review
1991
Allocating SMART cache segments for schedulability
Since they were first introduced in the IBM 360/85 in 1969, cache designs have been optimized for average case performance, which… 
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