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Single-precision floating-point format
Known as:
Single precision
, Single precision floating-point format
, 32-bit floating point
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Single-precision floating-point format is a computer number format that occupies 4 bytes (32 bits) in computer memory and represents a wide dynamic…
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Related topics
Related topics
50 relations
32-bit
ARM Cortex-M
C data types
C++
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
FHDO Biomedical Computer Science Group at Medical Classification Task of ImageCLEF 2015
Obioma Pelka
,
C. Friedrich
Conference and Labs of the Evaluation Forum
2015
Corpus ID: 10513384
This paper presents the modelling approaches performed by the FHDO Biomedical Computer Science Group for the compound figure…
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2011
2011
Godson-3B: A 1GHz 40W 8-core 128GFLOPS processor in 65nm CMOS
Weiwu Hu
,
Ru Wang
,
+5 authors
Xu Yang
IEEE International Solid-State Circuits…
2011
Corpus ID: 19621432
As the latest product of Godson processor series, the Godson-3B processor is an 8-core high-performance general-purpose processor…
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Highly Cited
2010
Highly Cited
2010
Optimizing and tuning the fast multipole method for state-of-the-art multicore architectures
Aparna Chandramowlishwaran
,
Samuel Williams
,
L. Oliker
,
I. Lashuk
,
G. Biros
,
R. Vuduc
IEEE International Parallel and Distributed…
2010
Corpus ID: 6957303
This work presents the first extensive study of single-node performance optimization, tuning, and analysis of the fast multipole…
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Highly Cited
2009
Highly Cited
2009
SAPPORO: A way to turn your graphics cards into a GRAPE-6
E. Gaburov
,
S. Harfst
,
S. Zwart
arXiv.org
2009
Corpus ID: 10499579
2009
2009
Optimized Custom Precision Function Evaluation for Embedded Processors
Dong-U Lee
,
J. Villasenor
IEEE transactions on computers
2009
Corpus ID: 12116551
Fixed-point processors are utilized in an enormous variety of applications, often for tasks that require the evaluation of…
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2009
2009
Exploring reconfigurable architectures for explicit finite difference option pricing models
Qiwei Jin
,
David B. Thomas
,
W. Luk
International Conference on Field-Programmable…
2009
Corpus ID: 14234904
This paper explores the application of reconfigurable hardware and Graphics Processing Units (GPUs) to the acceleration of…
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Highly Cited
2007
Highly Cited
2007
GRAPE-DR: 2-Pflops massively-parallel computer with 512-core, 512-Gflops processor chips for scientific computing
J. Makino
,
K. Hiraki
,
M. Inaba
International Conference on Software Composition
2007
Corpus ID: 15163079
We describe the GRAPE-DR (Greatly Reduced Array of Processor Elements with Data Reduction) system, which will consist of 4096…
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Highly Cited
2006
Highly Cited
2006
Program generation for the all-pairs shortest path problem
S. Han
,
F. Franchetti
,
Markus Püschel
International Conference on Parallel…
2006
Corpus ID: 2109775
A recent trend in computing are domain-specific program generators, designed to alleviate the effort of porting and re-optimizing…
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Highly Cited
2006
Highly Cited
2006
A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor
Hwa-Joon Oh
,
S. M. Müller
,
+9 authors
S. Dhong
IEEE Journal of Solid-State Circuits
2006
Corpus ID: 10427825
The floating-point unit (FPU) in the synergistic processor element (SPE) of a CELL processor is a fully pipelined 4-way single…
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Highly Cited
1975
Highly Cited
1975
Applications of EPISODE: an experimental package for the integration of systems of ordinary differential equations. [In FORTRAN for CDC 7600]
A. Hindmarsh
,
G. D. Byrne
1975
Corpus ID: 60189534
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