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Single-precision floating-point format

Known as: Single precision, Single precision floating-point format, 32-bit floating point 
Single-precision floating-point format is a computer number format that occupies 4 bytes (32 bits) in computer memory and represents a wide dynamic… 
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32-bitARM Cortex-MC data typesC++

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
FHDO Biomedical Computer Science Group at Medical Classification Task of ImageCLEF 2015
This paper presents the modelling approaches performed by the FHDO Biomedical Computer Science Group for the compound figure… 
2011
2011
Godson-3B: A 1GHz 40W 8-core 128GFLOPS processor in 65nm CMOS
As the latest product of Godson processor series, the Godson-3B processor is an 8-core high-performance general-purpose processor… 
2011
2011
A high-performance, low-power linear algebra core
Achieving high-performance while reducing power consumption is a key concern as technology scaling is reaching its limits. It is… 
2009
2009
Optimized Custom Precision Function Evaluation for Embedded Processors
Fixed-point processors are utilized in an enormous variety of applications, often for tasks that require the evaluation of… 
Highly Cited
2009
Highly Cited
2009
SAPPORO: A way to turn your graphics cards into a GRAPE-6
Highly Cited
2007
Highly Cited
2007
GRAPE-DR: 2-Pflops massively-parallel computer with 512-core, 512-Gflops processor chips for scientific computing
We describe the GRAPE-DR (Greatly Reduced Array of Processor Elements with Data Reduction) system, which will consist of 4096… 
Highly Cited
2006
Highly Cited
2006
A fully pipelined single-precision floating-point unit in the synergistic processor element of a CELL processor
The floating-point unit (FPU) in the synergistic processor element (SPE) of a CELL processor is a fully pipelined 4-way single… 
2000
2000
Pipelined Computation of Very Large Word-Length LNS Addition/Subtraction with Polynomial Hardware Cost
A novel pipelined method is proposed to compute the addition/subtraction in very large word-length logarithmic number system (LNS… 
1999
1999
Exact computation of the sign of a finite sum
Review
1986
Review
1986
The architecture, instruction set and development support for the WE®DSP32 digital signal processor
The WE®DSP32 Digital Signal Processor is a general purpose programmable single chip digital signal processor with 32-bit floating… 
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