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Serial binary adder
Known as:
Serial adder
, Serial binary adders
, Serial binary subtracter
The serial binary adder or bit-serial adder is a digital circuit that performs binary addition bit by bit. The serial full adder has three single-bit…
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Related topics
Related topics
3 relations
Flip-flop (electronics)
Ones' complement
Two's complement
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2015
2015
Design of digit serial FIR Filter for power optimization
S. S. Pusegaonkar
,
Vipin S. Bhure
International Conference on Green Computing and…
2015
Corpus ID: 2567482
The low power digital FIR Filter depending on digit serial adder and multiple constant multiplier (MCM) is explained in this…
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2013
2013
TECHNOLOGY Comparison between Serial Adder and Parallel Adder
Ashivani Dubey
,
Jagdish Nagar
2013
Corpus ID: 61292240
In digital circuit addition process is biggest and very important process. With the help of this meth od digital equipment…
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2013
2013
A Bit-Serial Reconfigurable VLSI Based on a Multiple-Valued X-Net Data Transfer Scheme
Xu Bai
,
M. Kameyama
IEICE Trans. Inf. Syst.
2013
Corpus ID: 7675856
A multiple-valued data transfer scheme using X-net is proposed to realize a compact bit-serial reconfigurable VLSI (BS-RVLSI). In…
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2012
2012
Novel asynchronous registers for sequential circuits with quantum-dot cellular automata
R. Katti
,
Sarjan Shrestha
IEEE International Symposium on Circuits and…
2012
Corpus ID: 13377406
Quantum-dot cellular automata (QCA) are nano-scale devices for implementing logic circuits. The disadvantage of QCA circuits is…
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2007
2007
Efficient Design of QCA Adder Structures
S. Haruehanroengra
,
Wen Wang
2007
Corpus ID: 553785
Optimizing arithmetic primitives such as quantum-dot cellular automata (QCA) adders is important for investigating high…
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2005
2005
Ultra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures
Valeriu Beiu
,
A. Djupdal
,
S. Aunet
International Work-Conference on Artificial and…
2005
Corpus ID: 12102778
In this paper we analyse a serial (ripple carry) and a parallel (Kogge-Stone) adder when operating in subthreshold at 100nm and…
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2004
2004
A method for increasing the throughput of fixed coefficient digit-serial/parallel multipliers
M. Karlsson
,
M. Vesterbacka
,
W. Kulesza
IEEE International Symposium on Circuits and…
2004
Corpus ID: 7614524
Fixed coefficient digit-serial/parallel multipliers are presented. The multipliers are based on unfolded bit-serial/parallel…
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1996
1996
Power consumption and performance of low-voltage bit-serial adders
T. Njølstad
,
E. Aas
IEEE International Symposium on Circuits and…
1996
Corpus ID: 61967193
By comparative simulations and chip measurements we have found that swing-restored pass transistor logic (SRPL) are suitable for…
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1995
1995
Highly parallel computers for artificial neural networks
T. Nordström
1995
Corpus ID: 196001846
During a number of years the two fields of artificial neural networks (ANNs) and highly parallel computing have both evolved…
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1995
1995
Ultra Low Energy Computing Using Adiabatic Switching Principle
Y. Ye
,
K. Roy
1995
Corpus ID: 18730135
This paper presents a new family of logic gates for ultra low energy computing using pulsed power CMOS logic. The logic gates use…
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