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Flip-flop (electronics)
Known as:
FF
, T flipflop
, Latch (electronic)
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In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable…
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2004
2004
Traffic Grooming Under a Sliding Scheduled Traffic Model in WDM Optical Networks
Bin Wang
,
Tianjian Li
,
Xubin Luo
,
Yuqi Fan
2004
Corpus ID: 16970830
Work on traffic grooming in mesh networks considered several traffic models: static traffic model, dynamic random traffic model…
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2001
2001
Study of FK Comae Berenices
H. Korhonen
,
S. Berdyugina
,
+10 authors
J. Virtanen
2001
Corpus ID: 11373069
We present 8 years of previously unpublished photometric observations of FK Com together with the determination of the stability…
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1995
1995
Very-high-speed Si bipolar static frequency dividers with new T-type flip-flops
K. Ishii
,
H. Ichino
,
Minoru Togashi
,
Yoshiji Kobayashi
,
C. Yamaguchi
IEEE J. Solid State Circuits
1995
Corpus ID: 62752054
This paper presents two circuit techniques for highspeed operation of a master-slave toggle flip-flop circuit (MSTFF). One…
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Review
1994
Review
1994
Free-space digital optical systems
H. S. Hinton
,
T. Cloonan
,
F. Mccormick
,
A. Lentine
,
F. Tooley
Proceedings of the IEEE
1994
Corpus ID: 61989726
Within the past 15 years there has been significant progress in the development of two-dimensional arrays of optical and…
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Highly Cited
1988
Highly Cited
1988
CONTEST: a concurrent test generator for sequential circuits
V. Agrawal
,
K. Cheng
,
P. Agrawal
25th ACM/IEEE, Design Automation Conference…
1988
Corpus ID: 6645024
The application of a concurrent fault simulator to automatic test vector generation is described. As faults are simulated in the…
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1988
1988
Pearl: a CMOS timing analyzer
James J. Cherry
25th ACM/IEEE, Design Automation Conference…
1988
Corpus ID: 10104128
Pearl is a timing analyzer that has been used to verify both full-custom VLSI and gate array designs. Rather than verify that a…
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Highly Cited
1987
Highly Cited
1987
The effects of setup time on output capacity in cellular manufacturing
Barbara B. Flynn
1987
Corpus ID: 113921058
Highly Cited
1982
Highly Cited
1982
The Case for Idealism
H. Kincaid
,
John Foster
1982
Corpus ID: 146694969
Highly Cited
1982
Highly Cited
1982
A synchronous approach for clocking VLSI systems
F. Anceau
IEEE Journal of Solid-State Circuits
1982
Corpus ID: 25559513
Presents a synchronous solution for clocking VLSI systems organized as distributed systems. This solution avoids the drawbacks of…
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1975
1975
A Branch-and-Bound Algorithm for Two-Stage Production-Sequencing Problems
Ergin Uskup
,
Spencer B. Smith
Operational Research
1975
Corpus ID: 9410635
This paper presents an algorithm for determining an optimum solution to a two-stage production sequencing problem with these…
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