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Analog delay line
Known as:
Delay line
An analog delay line is a network of electrical components connected in series, where each individual element creates a time difference or phase…
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Related topics
Related topics
23 relations
Bendix G-15
Bucket-brigade device
Charge-coupled device
Delay line memory
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2008
2008
CRLH Delay Line Pulse Position Modulation Transmitter
H. Nguyen
,
C. Caloz
IEEE Microwave and Wireless Components Letters
2008
Corpus ID: 46618306
A composite right/left-handed delay line pulse position modulation (PPM) transmitter is proposed. This system, compared with…
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Highly Cited
2005
Highly Cited
2005
Cross delay line detectors for high time resolution astronomical polarimetry and biological fluorescence imaging
O. Siegmund
,
J. Vallerga
,
P. Jelinsky
,
X. Michalet
,
S. Weiss
IEEE Nuclear Science Symposium Conference Record
2005
Corpus ID: 13981073
Ground based high time resolution astronomical polarimetry, imaging, and biological time-resolved molecular fluorescence lifetime…
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2004
2004
Hybrid analog-digital variable fiber-optic delay line
N. Riza
,
M. Arain
,
S.A. Khan
Journal of Lightwave Technology
2004
Corpus ID: 10467944
A variable fiber-optic delay line (VFODL) is introduced that, to the best of the authors' knowledge, is the first time that a…
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2004
2004
A self-calibrating delay-locked delay line with shunt-capacitor circuit scheme
F. Baronti
,
D. Lunardini
,
R. Roncella
,
R. Saletti
IEEE Journal of Solid-State Circuits
2004
Corpus ID: 2501395
This paper describes a CMOS 32-tap delay-locked delay line, realized with a shunt-capacitor circuit scheme, with an on-chip…
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2004
2004
A 66-333-MHz 12-mW register-controlled DLL with a single delay line and adaptive-duty-cycle clock dividers for production DDR SDRAMs
Y. Jeon
,
J. Lee
,
+4 authors
Hong-June Park
IEEE Journal of Solid-State Circuits
2004
Corpus ID: 45190075
The conventional register-controlled delay locked loop (RCDLL) with a single delay line requires a complex logic circuit…
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2002
2002
Design of a microwave variable delay line using liquid crystal, and a study of its insertion loss
T. Kuki
,
H. Fujikake
,
T. Nomoto
,
Y. Utsumi
2002
Corpus ID: 62584733
A microwave variable delay line was designed and fabricated using a nematic liquid crystal for the dielectric substrate of the…
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Highly Cited
2001
Highly Cited
2001
A synthesizable, fast and high-resolution timing measurement device using a component-invariant vernier delay line
A. Chan
,
G. Roberts
Proceedings International Test Conference (Cat…
2001
Corpus ID: 206679689
In recent years, much effort has been placed on improving the performance of timing and jitter measurement devices using Delay…
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Highly Cited
1999
Highly Cited
1999
A Digitally Controlled Shunt Capacitor CMOS Delay Line
Pietro Andreani
,
F. Bigongiari
,
R. Roncella
,
R. Saletti
,
P. Terreni
1999
Corpus ID: 38256288
Delay-controlled CMOS delay lines have been proved useful in a number of applications, notably the digitization of short time…
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Highly Cited
1997
Highly Cited
1997
A 1024-channel fast tunable delay line for ultrafast all-optical TDM networks
Kung-Li Deng
,
Koo Il Kang
,
I. Glask
,
P. Prucnal
IEEE Photonics Technology Letters
1997
Corpus ID: 33779347
Based on a passive k-stage feed-forward delay line structure, this letter presents a novel scheme which allows fast tuning among…
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1969
1969
Integrated MOS analog delay line
R. Mao
,
K. R. Keller
,
R. Ahrons
1969
Corpus ID: 61288723
A 16-stage, fixed or variable analog delay line that makes use of integrated p-channel MOS field-effect transistors is described…
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