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Runtime verification

Known as: Runtime validation, Verification 
Runtime verification is a computing system analysis and execution approach based on extracting information from a running system and using it to… 
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Related topics

Related topics

14 relations
AspectJDesign markerDynamic program analysisFormal verification

Broader (2)

Formal methodsLogic in computer science

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2009
2009
Proof-Carrying Hardware: Towards Runtime Verification of Reconfigurable Modules
Dynamically reconfigurable hardware combines hardware performance with software-like flexibility and finds increasing use in… 
2009
2009
Use of electronic calibration units for vector-network-analyzer verification
We present measurements demonstrating that electronic calibration units are stable enough to be used in place of mechanical… 
2009
2009
Reliable Monitoring for Runtime Validation of Choreographies
Cross-organizational business processes gain more and more attention in the scientific community. For modeling these processes… 
2008
2008
Focus on Isabelle : From Specification to Verification ?
This approach introduces a coupling of a specification framework with a verification system. Given a system, represented in a… 
2005
2005
Specifying Interaction Constraints of Software Components for Better Understandability and Interoperability
A vital issue in the correct use of commercial-off-the-shelf (COTS) components is the proper understanding of their functionality… 
2005
2005
Software safety: current status and future direction
This paper describes the current status of software safety in terms of research and existing standards. It highlights the… 
2004
2004
Supporting Elicitation And Specification Of Software Properties Through Patterns And Composite Propositions
Prospec is a tool that assists practitioners in the elicitation and specification of system properties. Practitioners are guided… 
2003
2003
Using AsmL for Runtime Verification
We use AsmL, an executable specification language created by the Foundations of Software Engineering group [1], to describe the… 
2002
2002
Two-Way Alternating Automata and Finite Models
A graph extension oft wo-way alternating automata on trees is considered. The following problem: "does a given automaton accept… 
1999
1999
Formal verification of reconfigurable cores
We show how a formal verification methodology can complement conventional verification for the development of FPGA-based cores… 
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