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Repeater insertion

Repeater insertion is a technique for reducing the time delay associated with long wire lines in integrated circuits. The technique involves cutting… Expand
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Papers overview

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2003
2003
In this paper, we study the full-chip interconnect power modeling.We show that repeater insertion is no longer sufficient… Expand
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Highly Cited
2002
Highly Cited
2002
This paper addresses the problem of power dissipation during the buffer insertion phase of interconnect performance optimization… Expand
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Highly Cited
2002
Highly Cited
2002
We present a unified framework that considers flipflop and repeater insertion and the placement of flip-flop/repeater blocks… Expand
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2002
2002
  • Yu Cao, X. Huang, +5 authors C. Hu
  • IEEE Trans. Very Large Scale Integr. Syst.
  • 2002
  • Corpus ID: 16921744
/sup A/ new approach to handle inductance effects for multiple signal lines is presented. The worst-case switching pattern is… Expand
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Highly Cited
2001
Highly Cited
2001
Repeaters are now widely used to increase the performance of long on-chip interconnections in CMOS VLSI. Significantly high power… Expand
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Highly Cited
2000
Highly Cited
2000
A closed-form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5… Expand
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Highly Cited
2000
Highly Cited
2000
Repeaters are now widely used to increase the performance of long on-chip interconnections in CMOS VLSI. In this paper, we take… Expand
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1999
1999
The effects of inductance on repeater insertion in RLC trees is the focus of the paper. An algorithm is introduced to insert and… Expand
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1999
1999
Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the… Expand
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1998
1998
A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 7… Expand
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