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RISC-V

Known as: RISC V, RISC-V architecture, RISCV 
RISC-V (pronounced "risk-five") is an open-source instruction set architecture (ISA) based on established reduced instruction set computing (RISC… 
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Papers overview

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2020
2020
Modern image processing applications, like object detection or image segmentation, require high computation and have high memory… 
2019
2019
In this paper, we propose a validation suite, applicable for different RISC-V designs. The suite can be considered as a stack of… 
2019
2019
The open-source instruction set architecture RISC-V has developed rapidly in recent years, and its combination mode of multiple… 
2018
2018
The Internet of Things has resulted in an exponential rise in the number of embedded electronic devices. This thesis deals with… 
2018
2018
In this paper we discuss how constraints can be applied for the design and verification of mixed-signal virtual prototypes based… 
2017
2017
Poor timing predictability of multicore processors has been a long-standing challenge in the real-time systems community. In this… 
2016
2016
RISC-V is an open-source instruction set-architecture, designed to support customized extensions and architectures. This paper… 
2014
2014
A wide range of low-level security policies can be expressed as rules on metadata tags and enforced using a combination of a… 
2008
2008
This article describes the hardware design of a RISC CPU IP core whose instructions are compatible with the Microchip PIC16C6X…