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Advanced Vector Extensions
Known as:
YMM9 register
, YMM8 register
, YMM7 register
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Advanced Vector Extensions (AVX) are extensions to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in…
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Related topics
Related topics
50 relations
256-bit
Addressing mode
Broadwell (microarchitecture)
Bulldozer (microarchitecture)
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Empirical Study of Power Consumption of x 86-64 Instruction Decoder
Mikael Hirki
,
J. Nurminen
,
T. Niemi
2016
Corpus ID: 12447190
It has been a common myth that x86-64 processors suffer in terms of energy efficiency because of their complex instruction set…
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Review
2016
Review
2016
Vectorization on Intel Xeon Phi: A Survey Approach
Niraj J. Tiwari
,
P. Vidap
2016
Corpus ID: 212487620
In computer science, vectorization is the process of converting an algorithm from a scalar implementation to a vector process. It…
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2015
2015
SIMD Enabled Functions on Intel Xeon CPU and Intel Xeon Phi Coprocessor
Florian Wende
2015
Corpus ID: 62929485
To achieve high floating point compute performance, modern processors draw on short vector SIMD units, as found e.g. in Intel…
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2015
2015
An investigation of compiler vectorization on current and next-generation Intel processors using benchmarks and Sandia?s Sierra applications.
M. Rajan
,
D. Doerfler
,
M. Tupek
,
S. Hammond
2015
Corpus ID: 8067961
Sandia and Los Alamos National Laboratories are acquiring Trinity, a Cray XC40, with half of the nodes having Haswell processors…
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2014
2014
Target-Specific Refinement of Multigrid Codes
Richard Membarth
,
Philipp Slusallek
,
M. Köster
,
Roland Leißa
,
Sebastian Hack
Fourth International Workshop on Domain-Specific…
2014
Corpus ID: 1425218
This paper applies partial evaluation to stage a stencil code Domain-Specific Language (DSL) onto a functional and imperative…
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2013
2013
Exploiting SIMD Instructions in Modern Microprocessors to Optimize the Performance of Stream Ciphers
P. Joseph
,
J. Rajan
,
Indira Gandhi
2013
Corpus ID: 54608966
Modern microprocessors are loaded with a lot of performance optimization features. Single Instruction Multiple Data (SIMD…
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2012
2012
Comparison of Software Technologies for Vectorization and Parallelization
A. Lazzaro
,
A. Nowak
,
S. Jarp
,
L. Valsan
2012
Corpus ID: 18498559
Executive Summary This paper demonstrates how modern software development methodologies can be used to give an existing…
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2012
2012
Parallel Stereo Vision Algorithm
W. Cockshott
,
Susanne Oehler
,
Tian Xu
,
J. Siebert
,
G. Aragon-Camarasa
MARC@RWTH
2012
Corpus ID: 28776967
Integrating a stereo-photogrammetric robot head into a real-time system requires software solutions that rapidly resolve the…
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2012
2012
BLAKE and 256-bit advanced vector extensions
Samuel Neves
,
Jean-Philippe Aumasson
2012
Corpus ID: 12023055
Intel recently documented its AVX2 instruction set extension that introduces support for 256-bit wide single-instruction multiple…
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2009
2009
High-performance synthetic aperture radar image formation on commodity multicore architectures
Daniel S. McFarlin
,
F. Franchetti
,
Markus Püschel
,
José M. F. Moura
Defense + Commercial Sensing
2009
Corpus ID: 12403234
Synthetic Aperture Radar (SAR) image processing platforms have to process increasingly large datasets under and hard real-time…
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