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Page table
Known as:
Address table
, Page translation tables
, Inverted page table
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A page table is the data structure used by a virtual memory system in a computer operating system to store the mapping between virtual addresses and…
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Related topics
Related topics
50 relations
Alpha 21064
CPU cache
CPU modes
CPUID
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Broader (1)
Memory management
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
S-OpenSGX: A system-level platform for exploring SGX enclave-based computing
Changho Choi
,
Nohyun Kwak
,
+4 authors
Brent Byunghoon Kang
Computers & security
2017
Corpus ID: 1189953
Review
2016
Review
2016
A survey of cloud network overlay protocols
M. Nadeem
,
Taimur Karamat
Digital Information and Communication Technology…
2016
Corpus ID: 2613442
Cloud computing is model for sharing of computing and storage resources over Internet. Virtualization is the key technique behind…
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2015
2015
Forensic analysis of windows user space applications through heap allocations
Michael I. Cohen
International Symposium on Computers and…
2015
Corpus ID: 12072167
Memory analysis is now used routinely for incident response and forensic applications. Current memory analysis techniques are…
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2009
2009
Performance analysis for 6loWPAN IEEE 802.15.4 with IPv6 network
Arfah A. Hasbollah
,
S. Ariffin
,
M. I. A. Hamini
IEEE Region 10 Conference
2009
Corpus ID: 45462
Wireless Sensor networks have become very useful in so many applications. Applications such as grape monitoring, insect movement…
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2008
2008
On the numbers of variables to represent sparse logic functions
Tsutomu Sasao
IEEE/ACM International Conference on Computer…
2008
Corpus ID: 13374806
In an incompletely specified function f, donpsilat care values can be chosen to minimize the number of variables to represent f…
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2006
2006
DHAPM: A New Host Auto-configuration Protocol for Highly Dynamic MANETs
M. Nazeeruddin
,
G. Parr
,
B. Scotney
Journal of Network and Systems Management
2006
Corpus ID: 10241431
MANETs are self-organizing infrastructure-less networks formed on the fly by a group of wireless nodes. The lack of central…
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2005
2005
Scalable Cross-Architecture Predictions of Memory Hierarchy Response for Scientific Applications
Gabriel Marin mgabi
2005
Corpus ID: 14093250
The gap between processor and memory speeds has been growing with each new generation of microprocessors. As a result, memory…
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2004
2004
A compiler framework for speculative optimizations
Jin Lin
,
Tong Chen
,
+4 authors
Sun C. Chan
TACO
2004
Corpus ID: 1062484
Speculative execution, such as control speculation or data speculation, is an effective way to improve program performance. Using…
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1997
1997
A study of virtual memory MTU reassembly within the PowerPC architecture
Lucas Aaron Womack
Proceedings Fifth International Symposium on…
1997
Corpus ID: 346210
Message transfer unit (MTU) reassembly schemes in modern operating systems cause I/O performance degradation when MTU sizes are…
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1985
1985
Results of geohydrologic test drilling in the eastern Snake River Plain, Gooding County, Idaho
1985
Corpus ID: 127083023
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