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Netlist
Known as:
Net
, Net (electronics)
, Netlists
In electronic design, a netlist is a description of the connectivity of an electronic circuit. A single netlist is effectively a collection of…
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ARM architecture
Application-specific integrated circuit
CAD navigation
Carl Ebeling
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2015
2015
High efficiency axial diffraction output schemes for the A6 relativistic magnetron
C. Leach
2015
Corpus ID: 109360182
Office of Naval Research Grant N00014-13-1-0565, Air Force Office of Scientific Research Grant FA9550-11-1-0200, Air Force Office…
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2011
2011
A Tool for Signal Probability Analysis of FPGA-Based Systems
C. Bernardeschi
,
Luca Cassano
,
A. Domenici
,
P. Masci
2011
Corpus ID: 62361848
We describe a model of Field Programmable Gate Array based systems realised with the Stochastic Activity Net- works formalism…
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2010
2010
Symbolic equation for linear analog electrical circuits using Matlab
Z. Erdei
,
L. A. Dicso
,
L. Neamt
,
Oliver Chiver
2010
Corpus ID: 59644118
In this paper is presented a program which generates the modified nodal equation for electric analog circuits in a symbolic…
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2007
2007
Optimal Layout Synthesis of Standard Cells in Large Scale Integration
T. Iizuka
2007
Corpus ID: 107425265
報告番号: 甲22286 ; 学位授与年月日: 2007-03-22 ; 学位の種別: 課程博士 ; 学位の種類: 博士(工学) ; 学位記番号: 博工第6491号 ; 研究科・専攻: 工学系研究科電子工学専攻
2001
2001
FedEx - a fast bridging fault extractor
Z. Stanojevic
,
D. Walker
Proceedings International Test Conference (Cat…
2001
Corpus ID: 15612962
Test pattern generation and diagnosis algorithms that target realistic bridging faults must be provided with a realistic fault…
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2000
2000
Computer-aided fault to defect mapping (CAFDM) for defect diagnosis
Z. Stanojevic
,
H. Balachandran
,
D. Walker
,
Fred Lakbani
,
J. Saxena
,
K. Butler
Proceedings International Test Conference (IEEE…
2000
Corpus ID: 1233075
Defect diagnosis in random logic is currently done using the stuck-at fault model, while most defects seen in manufacturing…
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1999
1999
Reconfigurable Multiplier for Virtex FPGA Family
Juri Põldre
,
Kalle Tammemäe
International Conference on Field-Programmable…
1999
Corpus ID: 206727281
This paper describes integer multiplier design optimizations for FPGA technology. The changes in partial product generator…
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1997
1997
Canonical TBDD's and Their Application to Combinational Verification
E. I. Goldberg
,
Y. Kukimoto
,
R. Brayton
1997
Corpus ID: 15838263
We propose a new class of decision diagrams called canonical cube transformation binary decision diagrams (canonical TBDD’s…
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1997
1997
Generation of synthetic sequential benchmark circuits
M. Hutton
,
Jonathan Rose
,
D. Corneil
Symposium on Field Programmable Gate Arrays
1997
Corpus ID: 9939843
Programmable logic architectures increase in capacity before commercial circuits are designed for them, yielding a distinct…
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1995
1995
EMBEDDED SYSTEM CO-DESIGN TOWARDS PORTABILITY AND RAPID INTEGRATION
G. Borriello
,
P. Chou
,
R. Ortega
1995
Corpus ID: 15034936