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Multi-project wafer service
Known as:
Multi Project Chip
, Multi Project Wafer
, MPC
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Multi-project chip (MPC), also known as multi-project wafer (MPW), services integrate onto microelectronics wafers a number of different integrated…
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Related topics
Related topics
7 relations
Broader (3)
Electronic design automation
Electronic engineering
Semiconductor device fabrication
Foundry model
Integrated circuit
MOSIS
WaferCatalyst
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Prototyping of an HV-CMOS demonstrator for the High Luminosity-LHC upgrade
E. Vilella
,
M. Benoit
,
+5 authors
J. Vossebeld
2016
Corpus ID: 59451086
HV-CMOS sensors can offer important advantages in terms of material budget, granularity and cost for large area tracking systems…
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2015
2015
MMI-based polarization beam splitter/combiner for InP photonic integrated circuits
M. Felicetti
,
K. Kojima
,
+4 authors
E. Yagyu
2015
Corpus ID: 16443626
An MMI-based polarization splitter/combiner with a TE-TM splitting ratio above 15 dB over a 21 nm wavelength range is…
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2013
2013
Semi-insulating substrate based generic InP photonic integration platform
F. Soares
,
K. Janiak
,
J. Kreissl
,
M. Moehrle
,
N. Grote
Microtechnologies for the New Millennium
2013
Corpus ID: 109722402
In the European projects EuroPIC and PARADIGM development of an InP based generic photonic integration technology is being…
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2012
2012
An InP-based generic integration technology platform
F. Soares
,
K. Janiak
,
A. Seeger
,
R. Broeke
,
N. Grote
International Conference on Intelligent Pervasive…
2012
Corpus ID: 10840271
This paper describes an InP foundry for receiver-type photonic-integrated circuits. A low-contrast-, a medium-contrast-, and a…
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2011
2011
Optimal wafer cutting in shuttle layout problems
Lasse Nisted
,
David Pisinger
,
A. Altman
Journal of combinatorial optimization
2011
Corpus ID: 8661004
A major cost in semiconductor manufacturing is the generation of photo masks which are used to produce the dies. When producing…
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Highly Cited
2010
Highly Cited
2010
A 0.13µm SiGe BiCMOS technology featuring fT/fmax of 240/330 GHz and gate delays below 3 ps
H. Rücker
,
B. Heinemann
,
+19 authors
Y. Yamamoto
IEEE Bipolar/BiCMOS Circuits and Technology…
2010
Corpus ID: 12107058
A 0.13 µm SiGe BiCMOS technology for millimeter wave applications is presented. This technology features high-speed HBTs (f<inf>T…
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2007
2007
CMOS-integrated silicon 3d force sensor system for micro component coordinate measurement machines
B. Levey
,
P. Gieschke
,
M. Doelle
,
A. Trautmann
,
P. Ruther
,
O. Paul
IEEE/LEOS International Conference on Optical…
2007
Corpus ID: 43697088
This paper reports a CMOS-integrated three-axial force sensor system realized using a post-CMOS compatible low-temperature…
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2007
2007
Reticle Exposure Plans for Multi-Project Wafers
Rung-Bin Lin
,
Da-Wei Hsu
,
Ming-Hsine Kuo
,
Meng-Chiou Wu
IEEE Design and Diagnostics of Electronic…
2007
Corpus ID: 24887732
A reticle exposure plan for a multi-project wafer (MPW) defines the sites where reticle images are printed on the wafer. In this…
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2006
2006
Design Space Exploration for Minimizing Multi-Project Wafer Production Cost
Rung-Bin Lin
,
Meng-Chiou Wu
,
Wei-Chiu Tseng
,
Ming-Hsine Kuo
,
Tsai-Ying Lin
,
Shr-Cheng Tsai
Asia and South Pacific Conference on Design…
2006
Corpus ID: 9886920
Chip floorplan in a reticle for Multi-Project Wafer (MPW) plays a key role in deciding chip fabrication cost. In this paper, we…
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2005
2005
An innovative model of multi-project wafer service in the foundry industry
Tai-Yih Yang
,
L. Tong
,
Benjamin J. C. Yuan
International Journal of Technology Management
2005
Corpus ID: 34115506
The cost of masks is rising rapidly as semiconductor manufacturing technology advances. This increase in cost is a major issue in…
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