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Motorola 68881

Known as: 68881, 68882, 68881 Microprocessor 
The 68020 and 68030 CPUs were designed with the separate 68881 chip in mind. Their instruction sets reserved the "F-line" instructions — that is, all… 
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CORDICCST ThorCentral processing unitCoprocessor

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
68882 FOI Housing
1992
1992
SEU testing of 32-bit microprocessors (for space application)
Microprocessor sensitivity to the upset phenomenon has been generally evaluated by enumerating the bit modifications of… 
1992
1992
CPS and the Fermilab farms
Cooperative Processes Software (CPS) is a parallel programming toolkit developed at the Fermi National Accelerator Laboratory. It… 
1992
1992
RESULTATS DU TEST AUX IONS LOURDS DU MICROPROCESSEUR 68020 ET DU COPROCESSEUR 68882 HEAVY ION TEST RESULTS FOR THE 68020 MICROPROCESSOR AND THE 68882 COPROCESSOR
This paper will present a set of techniques allowing to perform heavy ions testing on present 32-bits microprocessors. We study… 
1991
1991
A new computer system for education
1990
1990
The 68040 integer and floating-point units
The integer, floating-point, and on-chip memory subsystems of the Motorola 68040 microprocessor operate in parallel to achieve… 
1989
1989
Robot control computation in microprocessor systems with multiple arithmetic processors using a modified DF/IHS scheduling algorithm
The problem of designing a high-performance robot controller with multiple arithmetic processing units (APUs) is addressed. One… 
1988
1988
Techniques for user testing of the 68882
  • M. Marshall
  • International Test Conference Proceeding@m_New…
  • 1988
  • Corpus ID: 19668638
The steps required to develop a test program for the Motorola 68882 floating-point coprocessor, are documented, using only… 
1987
1987
Optimal design of multiple arithmetic processor-based robot controllers
  • Shaheen AhmadBo Li
  • Proceedings. IEEE International Conference on…
  • 1987
  • Corpus ID: 5179925
In this paper we discuss preliminary design considerations for the optimal design of multiple-apu (arithmetic processing unit… 
1987
1987
Distributed Data Acquisition for BNL802 I: The Front End
The BNL experiment 802 acquisition system comprises three VME crates. Data from Camac- and Fastbus-resident digitizers is… 
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