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ModelSim
ModelSim is a multi-language HDL simulation environment by Mentor Graphics, for simulation of hardware description languages such as VHDL, Verilog…
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Altera Quartus
Graphical user interface
Hardware description language
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Digital electronics
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2016
2016
Design and Verification of AMBA AHB-Lite protocol using Verilog HDL
Sravya Kante
,
Hari KishoreKakarla
,
Avinash Yadlapati
2016
Corpus ID: 212532516
—The SOC plan confronts a crevice between generation limit and time to market weights. The outline space develops with changes…
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2015
2015
SIPHER: Scalable Implementation of Primitives for Homomorphic Encryption
David Cousins
,
Kurt Rohloff
,
Christopher Peikert
,
Daniel Sumorok
2015
Corpus ID: 51854013
Abstract : The goal of SIPHER was to improve the efficiency and scalability of Fully Homomorphic Encryption (FHE). Significant…
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2013
2013
An FPGA Implementation of 1553 Protocol
Controller Jemti Jose
2013
Corpus ID: 13903892
In a modern military avionics system all the devices need to communicate as efficiently as possible with a minimum amount of…
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2013
2013
FPGA Implementation of 1D and 2D DWT Architecture using Modified Lifting Scheme
M. Nagabushanam
,
S. Ramachandran
,
P. Kumar
2013
Corpus ID: 7064086
Image compression is one of the prominent topics in image processing that plays a very important role in reducing image size for…
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2013
2013
Pipelined MIPS With Improved Datapath
Harpreet Kaur
,
Nitika Gulati
2013
Corpus ID: 61529399
This paper proposes a five stage pipelined processor with reduced number of unwanted transitions due to the stalls present in the…
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2012
2012
An integrated radix-4 modular divider/multiplier hardware architecture for cryptographic applications
L. Tawalbeh
,
Y. Jararweh
,
Abidalrahman Mohammad
˜The œinternational Arab journal of information…
2012
Corpus ID: 9240937
The increasing importance of security in computers and communication systems introduces the need for several public$key…
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2011
2011
Implementation of Channel Estimation and Modulation Technique for MIMO System
D. M. N. S. Swamy
2011
Corpus ID: 2243522
Future wireless communication system have to be designed to integrate features such as high data rates, high quality of service…
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2010
2010
FPGA based timing module and optical communication card design for spallation neutron source
Biswajit Singh
2010
Corpus ID: 55271760
2008
2008
Dynamic Lottery Bus Arbiter for Shared Bus System on Chip: A Design Approach with VHDL
Neeta Doifode
,
D. Padole
,
P. Bajaj
First International Conference on Emerging Trends…
2008
Corpus ID: 32941760
On-chip communication architecture plays an important role in determining the overall performance of the system-on-chip (SoC…
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2005
2005
AUTOMATIC CO-VERIFICATION OF FPGA DESIGNS IN SIMULINK
Georg Brandmayr
,
G. Humer
,
M. Rupp
2005
Corpus ID: 10613682
Verification of DSP systems is an error-prone and timeconsuming process, because many manual steps are required to create a…
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