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Memory divider

Known as: DRAM:FSB Ratio 
A memory divider is a ratio which is used to determine the operating clock frequency of computer memory in accordance with front side bus (FSB… 
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Related topics

Related topics

6 relations
CPU multiplierChipsetComputer memoryMotherboard

Broader (1)

Clock signal

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2012
2012
Repair dram based architecture 2.5d / 3d system wide chip i / o dram of
The present invention relates to a broad-based I / O? DRAM is 2.5D / 3D chip DRAM repair system architecture. 2.5D or 3D… 
2011
2011
Novel 1T DRAM Cell for Low-Voltage Operation and Long Data Retention Time
A novel one-transistor dynamic random access memory (1T DRAM) cell has been proposed for a low-voltage operation and longer data… 
Review
2008
Review
2008
Session 33: Memory technology - DRAM and NOR
This session presents recent advances in 1T DRAM, standard DRAM and NOR flash memory. The 1st Paper by Ki-Whan Song et al., from… 
2006
2006
Improved algorithm for RDO in JPEG2000 encoder and its IC design
2004
2004
An improved algorithm for rate distortion optimization in JPEG2000 and its integrated circuit implementation
Rate distortion optimization (RDO) plays an important role in a JPEG2000 encoder. An improved RDO algorithm is presented in this… 
1985
1985
A trench transistor cross-point DRAM cell
A 1T DRAM cell with both the transistor and the capacitor fabricated on the sidewalls of a deep trench is described. Trench… 
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