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Memory address

Known as: Memory addressing, ROM Address, Address 
In computing, memory address is a data concept used at various levels by software and hardware to access the computer's primary storage memory… 
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Related topics

Related topics

49 relations
.bss26-bit32-bitAPEXC

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2011
Highly Cited
2011
Partial-coherence abstractions for relaxed memory models
We present an approach for automatic verification and fence inference in concurrent programs running under relaxed memory models… 
Highly Cited
2010
Highly Cited
2010
Identifying student misconceptions of programming
Computing educators are often baffled by the misconceptions that their CS1 students hold. We need to understand these… 
Highly Cited
2006
Highly Cited
2006
EXE: automatically generating inputs of death
This paper presents EXE, an effective bug-finding tool that automatically generates inputs that crash real code. Instead of… 
Highly Cited
2006
Highly Cited
2006
Teaching robots by moulding behavior and scaffolding the environment
Programming robots to carry out useful tasks is both a complex and non-trivial exercise. A simple and intuitive method to allow… 
Highly Cited
2003
Highly Cited
2003
Scalar operand networks: on-chip interconnect for ILP in partitioned architectures
The bypass paths and multiported register files in microprocessors serve as an implicit interconnect to communicate operand… 
Highly Cited
2000
Highly Cited
2000
Vector instruction set support for conditional operations
Vector instruction sets are receiving renewed interest because of their applicability to multimedia. Current multimedia… 
Highly Cited
1999
Highly Cited
1999
Surviving the SOC Revolution
ion, communications can be described as moving frames, packets, or tokens between function blocks over channels. Below that… 
Highly Cited
1998
Highly Cited
1998
Register promotion by sparse partial redundancy elimination of loads and stores
An algorithm for register promotion is presented based on the observation that the circumstances for promoting a memory location… 
Highly Cited
1998
Highly Cited
1998
Memory dependence prediction using store sets
For maximum performance, an out-of-order processor must issue load instructions as early as possible, while avoiding memory-order… 
Highly Cited
1985
Highly Cited
1985
Implementing a cache consistency protocol
We present an ownership-based multiprocessor cache consistency protocol, designed for implementation by a single chip VLSI cache… 
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