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Memory address
Known as:
Memory addressing
, ROM Address
, Address
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In computing, memory address is a data concept used at various levels by software and hardware to access the computer's primary storage memory…
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Related topics
Related topics
49 relations
.bss
26-bit
32-bit
APEXC
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Bringing WDM Into Optical Static RAM Architectures
G. Kanellos
,
D. Fitsios
,
T. Alexoudi
,
C. Vagionas
,
A. Miliou
,
N. Pleros
Journal of Lightwave Technology
2013
Corpus ID: 20487370
Optical RAM appears to be the alternative approach towards overcoming the “Memory Wall” of electronics, suggesting use of light…
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2012
2012
Predicting Potential Speedup of Serial Code via Lightweight Profiling and Emulations with Memory Performance Model
Minjang Kim
,
Pranith Kumar
,
Hyesoon Kim
,
Bevin R. Brett
IEEE International Parallel and Distributed…
2012
Corpus ID: 15305142
We achieve very small runtime overhead: approximately a 1.2-10 times slowdown and moderate memory consumption. We demonstrate the…
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Highly Cited
2011
Highly Cited
2011
On interference abstractions
Nishant Sinha
,
Chao Wang
ACM-SIGACT Symposium on Principles of Programming…
2011
Corpus ID: 12673275
Interference is the bane of both concurrent programming and analysis. To avoid considering all possible interferences between…
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2008
2008
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Ofer Shacham
,
Megan Wachs
,
A. Solomatnikov
,
A. Firoozshahian
,
Stephen Richardson
,
M. Horowitz
41st IEEE/ACM International Symposium on…
2008
Corpus ID: 7444767
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols…
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2005
2005
Instruction based memory distance analysis and its application to optimization
Changpeng Fang
,
S. Carr
,
Soner Önder
,
Zhenlin Wang
International Conference on Parallel…
2005
Corpus ID: 14039796
Feedback-directed optimization has become an increasingly important tool in designing and building optimizing compilers as it…
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1999
1999
Probabilistic memory disambiguation and its application to data speculation
R. Ju
,
J. Collard
,
Karim Oukbir
CARN
1999
Corpus ID: 9012344
Memory references in an instruction stream often pose a challenge for performance improvements on high-performance…
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Highly Cited
1999
Highly Cited
1999
Low-power memory mapping through reducing address bus activity
P. Panda
,
N. Dutt
IEEE Transactions on Very Large Scale Integration…
1999
Corpus ID: 15013308
Arrays in behavioral specifications that are too large to fit into on-chip registers are usually mapped to off-chip memories…
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1998
1998
Value Profiling for Instructions and Memory Locations
P. Feller
1998
Corpus ID: 58736640
OF THE THESIS Value Pro ling for Instructions and Memory Locations by Peter Feller Master of Science in Computer Engineering…
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Highly Cited
1991
Highly Cited
1991
Optimal Matrix Transposition and Bit Reversal on Hypercubes: All-to-All Personalized Communication
A. Edelman
J. Parallel Distributed Comput.
1991
Corpus ID: 11017602
1989
1989
Construction of epsilon nets
J. Matoušek
SCG '89
1989
Corpus ID: 11126547
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