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Logical effort
Known as:
Stage Effort
, Branching Effort
, Principle of logical effort
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The method of logical effort, a term coined by Ivan Sutherland and Bob Sproull in 1991, is a straightforward technique used to estimate delay in a…
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Related topics
Related topics
7 relations
CMOS
Delay calculation
Electric
Elmore delay
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Broader (1)
Digital electronics
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2018
2018
Estimation in Large-Scale Software Development : An Industrial Case Study
M. Usman
,
Ricardo Britto
,
Lars-Ola Damm
,
J. Börstler
2018
Corpus ID: 89606138
Context: Software projects frequently incur schedule and budget overruns. Planning and estimation are particularly challenging in…
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2015
2015
MACHINE LEARNING TECHNIQUES IN SOFTWARE EFFORT ESTIMATION USING COCOMO DATASET
2015
Corpus ID: 9422366
Sonam Bhatia, , Varinder Kaur Attri (Dept .of CSE, GNDU RC Jalandhar, India) (Dept .of CSE, GNDU RC Jalandhar, India) AbstractOne…
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2012
2012
ASYNCHRONOUS CIRCUIT SIZEOPTIMIZATION USING INPUTDATA PROFILING
Evelyn R. Sowells
,
A. Walker
2012
Corpus ID: 14095047
Design techniques with energy-delay characteristics that are superior to synchronous timing and control approaches are needed…
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2011
2011
Tying Web Project Estimation with Risk Management
Pradnya B. Rane
,
Suchita Patil
,
Pallavi Kulkarni
,
B. Meshram
2011
Corpus ID: 16906434
Web project management is about using web services that are geographically distributed, where project managers and team members…
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2011
2011
Logical circuit gate sizing using MPSO guided by Logical Effort - An examination of the 4-stage half adder circuit
A. Johari
,
S. Mohamed
,
A. Halim
,
I. Yassin
,
H. Hassan
2011
Corpus ID: 63854589
Automated Complementary Metal Oxide Semiconductor (CMOS) logic circuit design leads to the reduction in costs associated with…
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2009
2009
Predicting Software Stage Effort with Sequence Changing Ratio
Song Qin
2009
Corpus ID: 64344643
Software stage effort has the features of data starvation and uncertainty. It is difficult to use the current methods (e.g…
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2007
2007
Estimation rapide du couple énergie/délai des circuits asynchrones QDI
J. Fragoso
,
G. Sicard
,
M. Renaudin
Techniques et sciences informatiques
2007
Corpus ID: 33150579
In order to bring about, in the case of a crossflow heat exchanger with two heating sections which can be individually regulated…
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2000
2000
Delay constrained optimization by simultaneous fanout tree construction, buffer insertion/sizing and gate sizing
I-Min Liu
,
A. Aziz
Proceedings International Conference on Computer…
2000
Corpus ID: 2396485
We present a novel algorithm for delay constrained optimization of combinational logic, extending the state-of-the-art sizing…
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Review
1993
Review
1993
Measuring the Information Systems Supervisor's Work-Unit Environment and Demonstrated Skill at Supervising
T. Ferratt
,
L. Short
,
Ritu Agarwal
Journal of Management Information Systems
1993
Corpus ID: 44401393
Research suggests that the management of information systems professionals makes a difference in the quality and quantity of…
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1993
1993
Generalized delay optimization of resistive interconnections through an extension of logical effort
Kumar Venkat
IEEE International Symposium on Circuits and…
1993
Corpus ID: 18166361
The resistance of VLSI interconnections is significant. Previous studies have proposed optimal repeater schemes using simple…
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