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Kogge–Stone adder

Known as: Kogge-Stone, Kogge-Stone Adder 
The Kogge–Stone adder is a parallel prefix form carry look-ahead adder. Other parallel prefix adders include the Brent-Kung adder, the Han Carlson… Expand
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Related topics

Related topics

5 relations
Adder (electronics)Carry (arithmetic)Carry-select adderCarry-skip adder
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Improved Fault Tolerant Sparse KOGGE Stone ADDER
A fault tolerant adder implemented using Kogge-stone configuration can correct the error due to inherent redundancy in the carry… Expand
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2013
2013
Design and Characterization of Sparse Kogge Stone Parallel Prefix Adder Using FPGA
The binary adder is the critical element in most digital circuit designs including digital signal processors (DSP) and… Expand
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Highly Cited
2012
Highly Cited
2012
Low Complexity Design of Ripple Carry and Brent–Kung Adders in QCA
The design of adders on quantum dot cellular automata (QCA) has been of recent interest. While few designs exist, investigations… Expand
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2012
2012
Design of Braun Multiplier with Kogge Stone Adder & It's Implementation on FPGA
Multiplication is the basic building block for several DSP processors, Image processing and many other. Over the years the… Expand
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2011
2011
A low-power methodology for configurable wide kogge-stone adders
We propose a methodology to reconfigure a wide Kogge- Stone (KS) adder that is typically used in multimedia applications in order… Expand
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2011
2011
Asynchronous Hybrid Kogge-Stone Structure Carry Select Adder Based IEEE-754 Double-Precision Floating-Point Adder
In this paper, the design and implementation of a generic fast asynchronous Hybrid Kogge-Stone Structure Carry Select based Adder… Expand
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Highly Cited
2009
Highly Cited
2009
Energy–Delay Optimization of 64-Bit Carry-Lookahead Adders With a 240 ps 90 nm CMOS Design Example
A methodology for energy-delay optimization of digital circuits is presented. This methodology is applied to minimizing the delay… Expand
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2009
2009
Arithmetic unit design using 180nm TSV-based 3D stacking technology
We describe the design of two three dimensional arithmetic units (a 3D adder and a 3D multiplier) that are implemented using… Expand
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Highly Cited
2003
Highly Cited
2003
Energy-delay estimation technique for high-performance microprocessor VLSI adders
We motivate the concept of comparing VLSI adders based on their energy-delay trade-offs and present a technique for estimating… Expand
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2000
2000
Higher radix Kogge-Stone parallel prefix adder architectures
In this paper, we describe the design of radix-3 and radix-4 parallel prefix adders, that theoretically have logical depths of… Expand
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