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Interconnect bottleneck

Known as: Interconnect problem 
The interconnect bottleneck refers to limits on integrated circuit (IC) performance due to connections between components instead of their internal… 
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Related topics

Related topics

16 relations
Bus (computing)Fibre ChannelInfiniBandIntegrated circuit

Broader (1)

Digital electronics

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2008
2008
Lagrangian Relaxation Based Inter-Layer Signal Via Assignment for 3-D ICs
Three-dimensional integrated circuits (3-D ICs), i.e., stacked dies, can alleviate the interconnect problem coming with the… 
Review
2007
Review
2007
Communication Architectures for Dynamically Reconfigurable FPGA Designs
This paper gives a survey of communication architectures which allow for dynamically exchangeable hardware modules. Four… 
Highly Cited
2006
Highly Cited
2006
Interconnect and thermal-aware floorplanning for 3D microprocessors
Interconnects are becoming an increasing problem from both performance and power consumption perspective in future technology… 
2006
2006
Nano Logic Circuits with Spin Wave Bus
We propose and analyze logic circuits utilizing spin waves as a physical mechanism for information transmission and processing… 
2004
2004
Nanoelectronic single‐electron transistor circuits and architectures
Single‐electron tunneling (SET) devices have been proposed as one promising candidate for future nanoelectronic integrated… 
Highly Cited
2000
Highly Cited
2000
Manhattan or non-Manhattan?: a study of alternative VLSI routing architectures
Circuit interconnect has become a substantial obstacle in the design of high performance systems. In this paper we explore a new… 
Highly Cited
1996
Highly Cited
1996
A design study of alternative network topologies for the Beowulf parallel workstation
Coupling PC based commodity technology with distributed computing methodologies provides on important advance in the development… 
Highly Cited
1994
Highly Cited
1994
RICE: rapid interconnect circuit evaluation using AWE
This paper describes the Rapid Interconnect Circuit Evaluator (RICE) software developed specifically to analyze RC and RLC… 
1992
1992
A CAD framework for simulation and optimization of high-speed VLSI interconnections
A CAD framework addressing three specific aspects of the high-speed interconnect problem, namely, simulation, sensitivity… 
Highly Cited
1982
Highly Cited
1982
A transmission line model for silicided diffusions: Impact on the performance of VLSI circuits
In scaled technologies, performance improvements become increasingly limited by interconnect parasitics. The increased emphasis… 
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