Instructions per cycle

Known as: Instruction per cycle, IPC, Instructions Per Clock 
In computer architecture, instructions per cycle (IPC) is one aspect of a processor's performance: the average number of instructions executed for… (More)
Wikipedia

Topic mentions per year

Topic mentions per year

1982-2017
0102019822017

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
Highly Cited
2003
Highly Cited
2003
Today’s high performance processors tolerate long latency operations by means of out-of-order execution. However, as latencies… (More)
  • figure 1
  • figure 2
  • table 1
  • table 2
  • figure 3
Is this relevant?
Highly Cited
2001
Highly Cited
2001
Pipelining allows processors to exploit parallelism. Unfortunately, critical loops---pieces of logic that must evaluate in a… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 5
Is this relevant?
Highly Cited
1999
Highly Cited
1999
State of the art microprocessors achieve high performance by executing multiple instructions per cycle. In an out-of-order engine… (More)
  • figure 1
  • figure 2
  • figure 3
  • figure 4
  • figure 6
Is this relevant?
Review
1997
Review
1997
The problem of extracting InstructionLevel Parallelism at levels of 10 instructionsper clock and higher is considered. Two… (More)
  • table 1
  • figure 1
  • figure 2
  • figure 3
  • figure 4
Is this relevant?
Highly Cited
1997
Highly Cited
1997
Superscalar processors currently have the potential to fetch multiple basic blocks per cycle by employing one of several recently… (More)
  • figure 1
  • table 1
  • figure 2
  • table 2
  • figure 3
Is this relevant?
Highly Cited
1996
Highly Cited
1996
Simultaneous multithreading is a technique that permits multiple independent threads to issue multiple instructions each cycle… (More)
  • figure 1
  • figure 2
  • table 1
  • table 2
  • figure 3
Is this relevant?
Highly Cited
1995
Highly Cited
1995
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar… (More)
  • figure 1
  • table 1
  • figure 3
  • figure 2
  • figure 6
Is this relevant?
Highly Cited
1991
Highly Cited
1991
Recent studies have concluded that little parallelism (less than two operations per cycle) is available in single instruction… (More)
  • table 1
  • figure 2
  • figure 1
  • figure 3
  • figure 4
Is this relevant?
Highly Cited
1989
Highly Cited
1989
Superscalar machines can issue several instructions per cycle. Superpipelined machines can issue only one instruction per cycle… (More)
  • figure 2-1
  • figure 2-2
  • figure 2-3
  • figure 2-5
  • figure 2-4
Is this relevant?
Highly Cited
1989
Highly Cited
1989
This paper investigates the limitations on designing a processor which can sustain an execution rate of greater than one… (More)
  • table 1
  • figure 1
  • table 2
  • table 3
  • table 4
Is this relevant?