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IBM POWER Instruction Set Architecture
Known as:
IBM POWER
, IBM POWER Architecture
, Power
POWER is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by IBM. The name is an acronym for Performance…
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Related topics
Related topics
34 relations
64-bit computing
AIX
Arithmetic logic unit
CDC 6600
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Vectorizing programs with IF-statements for processors with SIMD extensions
Huihui Sun
,
S. Gorlatch
,
Rongcai Zhao
Journal of Supercomputing
2019
Corpus ID: 207991180
Vectorization of programs is crucial for achieving high performance on modern processors with SIMD (Single Instruction Multiple…
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2016
2016
Performance Analysis of Spark/GraphX on POWER8 Cluster
Xinyu Que
,
L. Schneidenbach
,
Fabio Checconi
,
Carlos H. A. Costa
,
Daniele Buono
ISC Workshops
2016
Corpus ID: 35027023
POWER 8, the latest RISC (Reduced Instruction Set Computer) microprocessor of the IBM Power architecture family, was designed to…
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2011
2011
Mitigating DRAM complexities through coordinated scheduling policies
Jeffrey Stuecheli
2011
Corpus ID: 166915091
Acknowledgments I wish to thank the multitudes of people who helped me in the lengthy and difficult process of completing a Ph.D…
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2011
2011
IBM Power Architecture
Tejas Karkhanis
,
J. Moreira
Encyclopedia of Parallel Computing
2011
Corpus ID: 40612418
2010
2010
Code alignment for architectures with pipeline group dispatching
O. Boehm
,
Gadi Haber
,
Helena Kosachevsky
Annual Haifa Experimental Systems Conference
2010
Corpus ID: 10322837
Today's architectures exploit long pipelines in order to increase instruction-level parallelism by grouping sets of consecutive…
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2006
2006
Low-Power, High-Performance Architecture of the PWRficient Processor Family
Tse-Yu Yeh
IEEE Micro
2006
Corpus ID: 12138555
The dual-core PA6T-1682M system on chip (SoC) is the first design in the PWRficient family of high-performance, low-power…
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2006
2006
System Architecture for XML Offload to a Cell Processor-Based Workstation
Letz
,
Seiffert
,
V. Lunteren
,
Herrmann
2006
Corpus ID: 27886864
This paper describes the design, prototype implementation, and evaluation of a system architecture for XML offload to a Cell…
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1995
1995
PowerPC vs. Pentium
M. L. Schmit
1995
Corpus ID: 59734597
Review
1990
Review
1990
The IBM RISC System/6000 Processor: Hardware Overview
H. Bakoglu
,
G. Grohoski
,
R. Montoye
IBM Journal of Research and Development
1990
Corpus ID: 39106461
A highly concurrent superscalar second-generation family of RISC workstations and servers is described. The RISC System/6000…
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1990
1990
Managing Programs and Libraries in AIX Version 3 for RISC System/6000 Processors
M. Auslander
IBM Journal of Research and Development
1990
Corpus ID: 8821462
This paper describes the program and program-library management facility that has been developed for the AIX operating system…
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