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Fan-in
Known as:
Fan in
, Fanin
Fan-in is the number of inputs a gate can handle. For instance the fan-in for the AND gate shown in the figure is 3. Physical logic gates with a…
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Related topics
Related topics
10 relations
4000 series
ACC0
AND gate
Clique problem
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2017
2017
Modeling a membrane reactor for a zero-emission combined cycle power plant
J. Kotowicz
,
M. Job
2017
Corpus ID: 56332453
A zero emission gas turbine power plant with a membrane reactor works on the concept of using ion oxygen transport membrane (ITM…
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2017
2017
The Design Model of Freeway Toll Collection
Jin-Wei Chang
,
Kuntao Lai
,
Baizheng Wang
16th International Symposium on Distributed…
2017
Corpus ID: 46298610
The congestion of toll plaza is an urgent problem in traffic. According to the theory of cellular automata with the consideration…
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2015
2015
Wind analysis in the early design stage: an empirical study of wind visualisation techniques for architects
R. Castro
2015
Corpus ID: 112300462
This research develops a study about wind analysis techniques for rapid wind visualisation in the early design stage. It develops…
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2004
2004
A leakage-tolerant low-leakage register file with conditional sleep transistor
A. Agarwal
,
R. Kaushik
,
R. Krishnamurthy
IEEE International SOC Conference, . Proceedings.
2004
Corpus ID: 8006382
This paper describes a 256/spl times/64b 3-read, 3-write ported leakage tolerant low leakage register file. The local bitline…
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2004
2004
Optimisation of vertical axis wind turbines
W. Roynarin
2004
Corpus ID: 106621662
A practical Vertical Axis Wind Turbine (VAWTs) based on a Darrieus rotor has been designed and tested and found to be capable of…
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Highly Cited
2003
Highly Cited
2003
A leakage-tolerant high fan-in dynamic circuit design style [logic circuits]
H. Mahmoodi-Meimand
,
K. Roy
IEEE International [Systems-on-Chip] SOC…
2003
Corpus ID: 1634491
A leakage-tolerant design technique for high fan-in dynamic logic circuits is presented. An NMOS transistor with gate and drain…
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2003
2003
Monotonic circuits with complete acknowledgement
N. Starodoubtsev
,
S. Bystrov
,
A. Yakovlev
Ninth International Symposium on Asynchronous…
2003
Corpus ID: 704120
The paper studies a class of asynchronous circuits in which every signal transition on the inputs of every gate is acknowledged…
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1998
1998
AUTOMATIC SYNTHESIS OF GATE-LEVEL SPEED-INDEPENDENT CIRCUITS
P. Beerel
,
C. Myers
,
T. Meng
1998
Corpus ID: 17892906
This paper presents a CAD tool for the synthesis of robust asynchronous control circuits using limited-fanin basic gates such as…
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1993
1993
On self-routing in Clos connection networks
Barry G. Douglass
,
A. Oruç
IEEE Transactions on Communications
1993
Corpus ID: 16197045
A self-routing connection network is a switching device where the routing of each switch can be determined in terms of the…
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1963
1963
Design of ACP Resistor-Coupled Switching Circuits
D. Chung
,
John A. Palmieri
IBM Journal of Research and Development
1963
Corpus ID: 5286117
Directly coupled logic circuits utilizing silicon transistors have been developed in the Advanced Circuit Program. Silicon…
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