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Dynamic voltage scaling

Known as: DVS, Voltage scaling, Undervolting 
Dynamic voltage scaling is a power management technique in computer architecture, where the voltage used in a component is increased or decreased… 
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Papers overview

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Highly Cited
2009
Highly Cited
2009
In modern ICs, the trend of integrating more on-chip memories on a die has led SRAMs to account for a large fraction of total… 
Highly Cited
2007
Highly Cited
2007
Conventional voltage scaling systems require a delay margin to maintain a certain level of robustness across all possible device… 
Highly Cited
2007
Highly Cited
2007
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling… 
Highly Cited
2006
Highly Cited
2006
  • M. AliotoG. Palumbo
  • 2006
  • Corpus ID: 15372256
In this paper, some of the most practically interesting full adder topologies are analyzed in terms of their delay dependence on… 
Highly Cited
2005
Highly Cited
2005
We present a feasibility study of a power-reduction scheme that reduces the thermal power of processors by lowering frequency and… 
Highly Cited
2005
Highly Cited
2005
This paper proposes microarchitecture-level models for within die (WID) process and system parameter variability that can be… 
Highly Cited
2002
Highly Cited
2002
The driving force for the semiconductor industry growth has been the elegant scaling nature of CMOS technology. In future CMOS… 
Highly Cited
1998
Highly Cited
1998
This work describes the implementation of a low power IDCT chip targetted to medium and low bitrate applications. Our strategy… 
Highly Cited
1998
Highly Cited
1998
This MPEG4 video codec implements essential functions in the MPEG4 committee draft. It consumes 60 mW at 30 MHz, 30% of the power… 
Highly Cited
1997
Highly Cited
1997
Sub-quarter micron MOSFET's and ring oscillators with 2.5-6 nm physical gate oxide thicknesses have been studied at supply…