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DIMM
Known as:
ECC DIMM RAM
, Dual In-line Memory Module
, Micro-DIMM
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A DIMM or dual in-line memory module comprises a series of dynamic random-access memory integrated circuits. These modules are mounted on a printed…
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Related topics
Related topics
50 relations
Apollo VP3
Apple Network Server
Areal density (computer storage)
Cold boot attack
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Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2007
2007
Fault tolerant irregular augmented shuffle network
H. Sadawarti
,
P. Bansal
2007
Corpus ID: 61284039
The Performance of a system depends directly on the time required to perform an operation and number of these operations that can…
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2005
2005
Hardware/Software Codesign of On-chip Communication Architecture for Application-Specific Multiprocessor System-On-Chip
A. Baghdadi
,
A. Jerraya
2005
Corpus ID: 11940655
—System-on-chip (SoC) is developing as a new paradigm in electronic system design. This allows an entire hardware/software system…
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2004
2004
Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories]
G. Cardarilli
,
M. Ottavi
,
S. Pontarelli
,
M. Re
,
A. Salsano
19th IEEE International Symposium on Defect and…
2004
Corpus ID: 8220404
This paper introduces a very flexible approach for the evaluation of bit error rates (BER) attainable on storage systems which…
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Review
2001
Review
2001
Guest Editors' Intoduction: The New World of Large Embedded Memories
R. Rajsuman
,
F. Catthoor
IEEE Design & Test of Computers
2001
Corpus ID: 44355915
0740-7475/01/$10.00 © 2001 IEEE May–June 2001 AS APPLICATIONS continually grow in complexity and size, data storage technology…
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2000
2000
Constant coefficient multiplication in FPGA structures
K. Wiatr
,
E. Jamro
Proceedings of the 26th Euromicro Conference…
2000
Corpus ID: 41124694
Investigates different architectures implementing bit-parallel constant-coefficient multiplication in FPGA structures. First…
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1995
1995
Conflict-Free Access for Streams in Multimodule Memories
M. Valero
,
T. Lang
,
Montse Peiron
,
E. Ayguadé
IEEE Trans. Computers
1995
Corpus ID: 2059273
Address transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access…
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1986
1986
The Architecture of SM3: A Dynamically Partitionable Multicomputer System
C. Baru
,
S. Su
IEEE transactions on computers
1986
Corpus ID: 38331446
The architecture of a multicomputer system with switchable main memory modules (SM3) is presented. This architecture supports the…
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1983
1983
Shared Cache for Multiple-Stream Computer Systems
Phil C. C. Yeh
,
J. Patel
,
E. Davidson
IEEE transactions on computers
1983
Corpus ID: 9374003
Cache memory organization for parallel-pipelined multiprocessor systems is evaluated. Private caches have a cache coherence…
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1976
1976
Functional simulation in the lamp system
S. Chappell
,
P. R. Menon
,
J. F. Pellegrin
,
A. Schowe
Design Automation Conference
1976
Corpus ID: 14551703
The effective use of simulation for logic verification and test evaluation frequently requires simulation capabilities at…
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1971
1971
On the Performance of Interleaved Memories with Multiple-Word Bandwidths
E. Coffman
,
G. Burnett
,
R. Snowdon
IEEE transactions on computers
1971
Corpus ID: 7520580
Past studies of the performance of interleaved memory systems are extended in this note by adopting a more general model. The…
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