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Computer architecture simulator
Known as:
CAS
, Cycle accurate simulator
, Full system simulator
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A computer architecture simulator, or an architectural simulator, is a piece of software to model computer devices (or components) to predict outputs…
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Related topics
Related topics
18 relations
ARMulator
BrookGPU
Computer architecture
Computer memory
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Broader (1)
Simulation software
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
Review
2013
Review
2013
ACO Based Routing Algorithms for Ad-hoc Network (WSN, MANETs): A Survey
Sudarshan D Shirkande
,
R. Vatti
International Conference on Communication Systems…
2013
Corpus ID: 14732309
In Ad-Hoc network there are many problems, which can be categorized as an optimization problem such as energy consumption…
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2011
2011
POPS: Coherence Protocol Optimization for Both Private and Shared Data
Hemayet Hossain
,
S. Dwarkadas
,
Michael C. Huang
International Conference on Parallel…
2011
Corpus ID: 16486020
As the number of cores in a chip multiprocessor (CMP) increases, the need for larger on-chip caches also increases in order to…
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2011
2011
Automatic Extraction of Pipeline Parallelism for Embedded Software Using Linear Programming
D. Cordes
,
A. Heinig
,
P. Marwedel
,
A. Mallik
IEEE 17th International Conference on Parallel…
2011
Corpus ID: 15776921
The complexity and performance requirements of embedded software are continuously increasing, making Multiprocessor System-on…
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2009
2009
Hybrid-compiled simulation: An efficient technique for instruction-set architecture simulation
Mehrdad Reshadi
,
P. Mishra
,
N. Dutt
TECS
2009
Corpus ID: 6652668
Instruction-set simulators are critical tools for the exploration and validation of new processor architectures. Due to the…
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2009
2009
Energy simulation of embedded XScale systems with XEEMU
Zoltán Herczeg
,
Daniel Schmidt
,
Ákos Kiss
,
N. Wehn
,
T. Gyimóthy
Journal of Embedded Computing
2009
Corpus ID: 16958867
Energy efficiency is key in embedded system design. Understanding the complex issue of software power consumption in early design…
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2007
2007
I/O processing in a virtualized platform: a simulation-driven approach
Vineet Chadha
,
R. Illikkal
,
R. Iyer
,
Jaideep Moses
,
D. Newell
,
R. Figueiredo
International Conference on Virtual Execution…
2007
Corpus ID: 14092469
Virtualization provides levels of execution isolation and service partition that are desirable in many usage scenarios, but its…
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2005
2005
ChipLock: support for secure microarchitectures
Taeho Kgil
,
Laura Falk
,
T. Mudge
CARN
2005
Corpus ID: 9213563
The increasing need for security has caused system designers to consider placing some security support directly at the hardware…
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2001
2001
An 8x8 IDCT Implementation on an FPGA-Augmented TriMedia
M. Sima
,
S. Cotofana
,
J. V. Eijndhoven
,
S. Vassiliadis
,
K. Vissers
IEEE Symposium on Field-Programmable Custom…
2001
Corpus ID: 16688429
This paper presents an experiment which aims to assess the potential impact on performance yielded by augmenting a TriMedia/CPU64…
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2000
2000
Timestamp snooping: an approach for extending SMPs
Milo M. K. Martin
,
Daniel J. Sorin
,
+7 authors
D. Wood
International Conference on Architectural Support…
2000
Corpus ID: 53224608
Symmetric muultiprocessor (SMP) servers provide superior performance for the commercial workloads that dominate the Internet. Our…
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1998
1998
MetaCore: an application specific DSP development system
Jin-Hyuk Yang
,
Byoung-Woon Kim
,
+19 authors
C. Kyung
Proceedings Design and Automation Conference…
1998
Corpus ID: 5951770
This paper describes the MetaCore system which is an ASIP (Application-Specific Instruction set Processor) development system…
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