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CHMOS
CHMOS refers to one of a series of Intel CMOS processes developed from their HMOS process. (H stands for high-density). CHMOS was used in the Intel…
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6 relations
CMOS
Depletion-load NMOS logic
Intel i860
NMOS logic
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Broader (1)
Digital electronics
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2011
2011
Some aspects of human performance in a Human Adaptive Mechatronics (HAM) system
T. Parthornratt
2011
Corpus ID: 19834717
An interest in developing the intelligent machine system that works in conjunction with human has been growing rapidly in recent…
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2000
2000
DIGIT-SERIAL SEMI { SYSTOLIC CONVOLVER
I. Milentijevi
,
M. Stoj
,
Dejan Maksimovi
2000
Corpus ID: 16978892
We focus our attention on convolution of time discrete and digital signals, as one of many compute{bound problems that can beni t…
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1998
1998
Organización de máquinas digitales 1
G. Guzmán
,
José Ignacio Vega Luna
,
R. González
1998
Corpus ID: 190998226
Highly Cited
1990
Highly Cited
1990
Robustness enhancement of DC drives with a smooth optimal sliding mode control
J. Zhang
,
T. H. Barton
Conference Record of the IEEE Industry…
1990
Corpus ID: 16752803
A quantitative analysis of the robustness of a DC drive control system is attempted. The time-domain expressions of the transient…
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1989
1989
A 15 ns 2500 gate highly flexible CHMOS EPLD
R. W. Swartz
,
M. J. Allen
Proceedings of the IEEE Custom Integrated…
1989
Corpus ID: 62153211
A 2500-gate, 15-ns CMOS electrically programmable logic device (EPLD) with configurable inputs, expandable sum of products (SOP…
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Highly Cited
1989
Highly Cited
1989
A 1,000,000 transistor microprocessor
L. Kohn
,
S. Fu
IEEE International Solid-State Circuits…
1989
Corpus ID: 58413700
The authors describe a 1,000,000-transistor single-chip microprocessor which uses RISC (reduced-instruction-set-computer) design…
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1987
1987
Effectiveness of CMOS Charge Reflection Barriers in Space Radiation Environments
P. Mcnulty
,
J. E. Lynch
,
W. Abdel-Kader
IEEE Transactions on Nuclear Science
1987
Corpus ID: 42836564
Single event upsets in microelectronic circuits follow the collection of more than some critical amount of charge at certain…
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1984
1984
A double layer metal CHMOS III technology
R.J. Smith
,
G. Sery
,
+7 authors
K. Kokkonen
International Electron Devices Meeting
1984
Corpus ID: 45969627
A high-performance CMOS technology (CHMOS III) utilizing 1.5 micron lithorgraphy, p-well processing, and two layers of metal has…
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1983
1983
Characterization and modeling of transient latchup in CHMOS technology
E. Hamdy
,
A. Mohsen
International Electron Devices Meeting
1983
Corpus ID: 34099400
This paper presents the experimental results of transient latchup initiation measured on various test structures and pulsing…
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1983
1983
CHMOS - The Emerging VLSI Technology
K. Yu
Symposium on VLSI Technology. Digest of Technical…
1983
Corpus ID: 6179520
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