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Branch target predictor

Known as: Branch target buffer 
In computer architecture, a branch target predictor is the part of a processor that predicts the target of a taken conditional branch or an… 
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Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Static worst-case execution time analysis enables to obtain guaranteed timing bounds for programs, which is required for safety… 
2014
2014
The AMD two-core x86-64 CPU module, codenamed “Steamroller”, contains 236 million transistors implemented in 28nm high-κ metal… 
2012
2012
Branch Target Buffer (BTB) plays an important role for pipelined processors in branch prediction during the execution of loops… 
2009
2009
This paper explains a new design of a high speed MIPS (Microprocessor without Interlocked Pipelined Stages) based processor with… 
2009
2009
This paper presents two effective methods to reduce power consumption of branch target buffer (BTB): 1) the first method is based… 
2002
2002
We use a formal tool to extract Finite State Machines (FSM) based representations (lists of states and transitions) of sequential… 
Highly Cited
2000
Highly Cited
2000
This paper presents a new mechanism for collecting and deploying runtime optimized code. The code-collecting component resides in… 
1996
1996
  • Yue LiuD. Kaeli
  • 1996
  • Corpus ID: 43144311
Cache memories are commonly used to reduce the performance gap between microprocessor and memory technology. To increase the…