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Beyond CMOS

Known as: Beyond-CMOS 
Beyond CMOS refers to the possible future digital logic technologies beyond the CMOS scaling limits which limits device density and speeds due to… 
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Related topics

Related topics

8 relations
CMOSIvy Bridge (microarchitecture)Moore's lawOptical computing

Broader (1)

Digital electronics

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2019
2019
Synchronous Circuit Design With Beyond-CMOS Magnetoelectric Spin–Orbit Devices Toward 100-mV Logic
The supply voltage scaling has become increasingly challenging in the advanced CMOS technology due to the threshold voltage… 
2016
2016
Can beyond-CMOS devices illuminate dark silicon?
Throughout the last decade, the microprocessor industry has been struggling to preserve the benefits of Moore's Law scaling. The… 
2016
2016
Emerging Photonic Hardware Platforms
Photonic integrated circuit technology could revolutionize optical information processing, beyond conventional binary-logic… 
Highly Cited
2012
Highly Cited
2012
Low Energy Magnetic Domain Wall Logic in Short, Narrow, Ferromagnetic Wires
We present circuit simulation results of an implementation of universal logic that operates at low switching energy. Information… 
Highly Cited
2012
Highly Cited
2012
Uniform methodology for benchmarking beyond-CMOS logic devices
A consistent methodology for benchmarking beyond CMOS logic devices was developed to guide the research directions. The promising… 
Highly Cited
2010
Highly Cited
2010
Graphene for CMOS and Beyond CMOS Applications
Owing in part to complementary metal-oxide-semiconductor (CMOS) scaling issues, the semiconductor industry is placing an… 
2010
2010
Nanoelectronics Research for Beyond CMOS Information Processing
The field of nanoelectronics and, in particular, the vision of extending complementary metalYoxideY semiconductor (CMOS) and the… 
2009
2009
Innovative devices for integrated circuits – A design perspective
2006
2006
Impact of STI on the reliability of narrow-width pMOSFETs with advanced ALD N/O gate stack
For the first time, a shallow trench isolation (STI)-induced enhanced degradation in pMOSFETs for ultrathin gate oxide devices… 
2005
2005
Performance evaluation of 50 nm In/sub 0.7/Ga/sub 0.3/As HEMTs for beyond-CMOS logic applications
We have studied the suitability of nanometer-scale In<sub>0.7</sub>Ga<sub>0.3</sub>As HEMTs as a high-speed, low-power logic… 
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