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Beta encoder

Known as: Golden ratio encoder 
A beta encoder is an analog-to-digital conversion (A/D) system in which a real number in the unit interval is represented by a finite representation… 
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Related topics

Related topics

5 relations
Analog-to-digital converterQuantization (signal processing)Sampling (signal processing)

Broader (2)

Digital signal processingSignal processing

Papers overview

Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Complexity model based load-balancing algorithm for parallel tools of HEVC
Load balancing algorithm supporting parallel tools for HEVC encoder is proposed in this paper. Standardization of HEVC version 1… 
2011
2011
Improving QoS of VoWLAN via Cross-Layer-Based Adaptive Approach
The next generation technology of Voice over Internet Protocol (VoIP) allows voice to be delivered over the Internet Protocol… 
Review
2010
Review
2010
Acquiring and Sharing Knowledge for Developing SCA Based Waveforms on SDRs
Abstract : The NATO Research and Technology Organization (RTO) / Information Systems Technology (IST) Research Task Group (RTG… 
2010
2010
Recursive convolutional codes for time-invariant LDPC convolutional codes
In this paper we present an attractive alternative to construct time-invariant Low-Density Parity-Check Convolutional Codes (LDPC… 
2010
2010
Optimal DSP Based Integer Motion Estimation Implementation for H.264/AVC Baseline Encoder
The coding gain of the H.264/AVC video encoder mainly comes from the new incorporated prediction tools. However, their enormous… 
2006
2006
A general and optimal framework to achieve the entire rate region for Slepian-Wolf coding
2004
2004
VHDL-AMS behavioral modeling and simulation of a /spl Pi//4 DQPSK transceiver system
This work describes a methodology for top-down design, modeling, and simulation of complete /spl Pi//4 DQPSK system using… 
1999
1999
Sequence MAP decoding of trellis codes for Gaussian and Rayleigh channels
This paper considers the use of sequence maximum a posteriori (MAP) decoding of trellis codes. A MAP receiver can exploit any… 
1995
1995
A Multiplier-Accumulator Macro for a 45 MIPS Embedded RISC Processor
This paper describes a high speed and area effective multiplier-accumulator for an embedded RISC processor. The point is to… 
Highly Cited
1976
Highly Cited
1976
Analysis of a Model of the Triceps Surae Muscle Reflex Control System
Limit-cycle oscillations of two models of the triceps surae muscle stretch reflex system are analyzed, using previously derived… 
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