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Apple Multiple Scan 14 Display
The Apple Multiple Scan 14 Display is a 12.4" viewable shadow mask CRT that was manufactured by Apple Inc. from August 7, 1995 until September 14…
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Cathode ray tube
List of products discontinued by Apple Inc.
Shadow mask
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
Delay fault testing using partial multiple scan chains
E. Bareisa
,
V. Jusas
,
K. Motiejunas
,
R. Seinauskas
Microelectronics and reliability
2013
Corpus ID: 41123103
2010
2010
Multi-degree smoother for low power consumption in single and multiple scan-chains BIST
A. Abu-Issa
,
S. Quigley
IEEE International Symposium on Quality…
2010
Corpus ID: 23502195
This paper presents a smoothing technique for the output sequence of linear feedback shift registers (LFSR) to reduce power…
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2007
2007
A Multilayer Data Copy Test Data Compression Scheme for Reducing Shifting-in Power for Multiple Scan Design
Shih-Ping Lin
,
Chung-Len Lee
,
Jwu-E Chen
,
Ji-Jan Chen
,
Kun-Lun Luo
,
Wen Ching Wu
IEEE Transactions on Very Large Scale Integration…
2007
Corpus ID: 8920885
The random-like filling strategy pursuing high compression for today's popular test compression schemes introduces large test…
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2007
2007
Local vertical profile corrections using data from multiple scan elevations
H. Lewis
2007
Corpus ID: 54987619
The variation of reflectivity with height is understood to be one of the most significant sources of error affecting the…
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2006
2006
Scan-BIST based on transition probabilities for circuits with single and multiple scan chains
I. Pomeranz
,
S. Reddy
IEEE Transactions on Computer-Aided Design of…
2006
Corpus ID: 13941870
It is demonstrated that it is possible to generate a deterministic test set that detects all the detectable single stuck-at…
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2005
2005
Low Power Test Compression Technique for Designs with Multiple Scan Chain
Youhua Shi
,
N. Togawa
,
M. Yanagisawa
,
T. Ohtsuki
,
S. Kimura
Asian Test Symposium
2005
Corpus ID: 5422450
This paper presents a new DFT technique that can significantly reduce test data volume as well as scan-in power consumption for…
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2004
2004
The efficient multiple scan chain architecture reducing power dissipation and test time
Il-soo Lee
,
Yongmin Hur
,
T. Ambler
Asian Test Symposium
2004
Corpus ID: 19931888
The efficient use of unspecified bit in input test cube and its response test cube (henceforth, test set) reduces power…
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2003
2003
Layout driven synthesis of multiple scan chains
K. Rahimi
,
M. Soma
IEEE Trans. Comput. Aided Des. Integr. Circuits…
2003
Corpus ID: 31583362
In this paper, we investigate the problem of assigning scan cells to multiple scan chains based on physical placement. We…
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2003
2003
Designing multiple scan chains for systems-on-chip
Md. Saffat Quasem
,
S. Gupta
Test Symposium
2003
Corpus ID: 35510543
We propose a branch-and-bound framework for designing non-reconfigurable multiple scan chains for systems-on-chip to minimize…
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1995
1995
Testability design with multiple scan chains
Bo Ye
,
Z. Zheng
,
Jun Hu
,
Wei Li
Proceedings of 4th International Conference on…
1995
Corpus ID: 61137087
The methodology of constructing scan chains in a design with multiple scan chains is proposed in this paper. The multiple scan…
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