Skip to search form
Skip to main content
Skip to account menu
Semantic Scholar
Semantic Scholar's Logo
Search 226,421,698 papers from all fields of science
Search
Sign In
Create Free Account
Apothecaries Dram Mass Unit
Known as:
dram (drachm)
, Apothecaries Dram
, dr ap
Expand
The non-SI unit of mass equal to 60 grains, 3 scruples, 1/8 troy ounce, or approximately 3.8879 grams.
National Institutes of Health
Create Alert
Alert
Related topics
Related topics
1 relation
Dram Mass Unit
Papers overview
Semantic Scholar uses AI to extract papers important to this topic.
2013
2013
RowClone: Fast and Efficient In-DRAM Copy and Initialization of Bulk Data
Vivek Seshadri
,
Yoongu Kim
,
+8 authors
T. Mowry
2013
Corpus ID: 3065319
Many programs initialize or copy large amounts of memory data. Initialization and copying are forms of memory operations that do…
Expand
2011
2011
A Hybrid Analytical DRAM Performance Model
George L. Yuan
,
Tor M. Aamodt
2011
Corpus ID: 18809602
As process technology scales, the number of transistors that can fit in a unit area has increased exponentially. Processor…
Expand
2007
2007
Issues and challenges of double patterning lithography in DRAM
Seomin Kim
,
Sunyoung Koo
,
+6 authors
Jinwoong Kim
SPIE Advanced Lithography
2007
Corpus ID: 108828708
Double patterning lithography has been one of the candidates for sub-40nm patterning era, and has a lot of process issues to be…
Expand
2006
2006
1T MEMS Memory Based on Suspended Gate MOSFET
N. Abelé
,
A. Villaret
,
A. Gangadharaiah
,
C. Gabioud
,
Pascal Ancey
,
Adrian M. Ionescu
International Electron Devices Meeting
2006
Corpus ID: 45173813
The design, operation, characterization and scalability of a 1T SG-MOSFET memory cell that combines a MOSFET solid-state device…
Expand
2004
2004
A highly manufacturable deep trench based DRAM cell layout with a planar array device in a 70nm technology
J. Amon
,
A. Kieslich
,
+12 authors
J. Alsmeier
IEDM Technical Digest. IEEE International…
2004
Corpus ID: 6178812
For the first time, a new DRAM cell layout as the key enabler for future DRAM shrink generations based on deep trench (DT…
Expand
2004
2004
A 0.6V 205MHz 19.5ns tRC 16Mb embedded DRAM
K. Hardee
,
F. Jones
,
+9 authors
I. Arakawa
IEEE International Solid-State Circuits…
2004
Corpus ID: 29006933
A 0.6V 16Mb embedded DRAM macro is presented as a solution for mobile personal consumer applications. The macro has 128 separate…
Expand
2000
2000
A low-jitter mixed-mode DLL for high-speed DRAM applications
Jae Joon Kim
,
Sang-Bo Lee
,
T. Jung
,
Changhyun Kim
,
Sooin Cho
,
Beomsup Kim
IEEE Journal of Solid-State Circuits
2000
Corpus ID: 23691968
This paper presents a salient clock deskewing method with a mixed-mode delay-locked loop (MDLL) for high-speed synchronous DRAM…
Expand
2000
2000
VIRAM1: A MediaOriented Vector Processor with Embedded DRAM
Joseph Gebis
,
Samuel Williams
,
Christos Kozyrakis
2000
Corpus ID: 16390599
Processors for mobile multimedia devices must be low power while having excellent performance on media applications. Our…
Expand
Highly Cited
1997
Highly Cited
1997
Parallel processing RAM chip with 256 Mb DRAM and quad processors
Kazuaki Murakami
,
Satoru Shirakawa
,
H. Miyajima
IEEE International Solids-State Circuits…
1997
Corpus ID: 36299902
Parallel processing RAM (PPRAM) is an architectural framework for merged memory/logic application-specific standard products…
Expand
1994
1994
New DRAM Technologies: A Comprehensive Analysis of the New Architecture
S. Przybylski
1994
Corpus ID: 53896950
By clicking accept or continuing to use the site, you agree to the terms outlined in our
Privacy Policy
(opens in a new tab)
,
Terms of Service
(opens in a new tab)
, and
Dataset License
(opens in a new tab)
ACCEPT & CONTINUE